
John P. Dulka
Examiner (ID: 18278, Phone: (571)270-7398 , Office: P/2895 )
| Most Active Art Unit | 2895 |
| Art Unit(s) | 2817, 2895 |
| Total Applications | 1000 |
| Issued Applications | 819 |
| Pending Applications | 77 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8753592
[patent_doc_number] => 20130087896
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-11
[patent_title] => 'STACKING-TYPE SEMICONDUCTOR PACKAGE STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/331294
[patent_app_country] => US
[patent_app_date] => 2011-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6352
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13331294
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/331294 | STACKING-TYPE SEMICONDUCTOR PACKAGE STRUCTURE | Dec 19, 2011 | Abandoned |
Array
(
[id] => 10196068
[patent_doc_number] => 09224983
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-29
[patent_title] => 'Substrate for surface light emitting device and method of manufacturing the substrate, surface light emitting device, lighting apparatus, and backlight including the same'
[patent_app_type] => utility
[patent_app_number] => 13/331316
[patent_app_country] => US
[patent_app_date] => 2011-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 29483
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 32
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13331316
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/331316 | Substrate for surface light emitting device and method of manufacturing the substrate, surface light emitting device, lighting apparatus, and backlight including the same | Dec 19, 2011 | Issued |
Array
(
[id] => 11286829
[patent_doc_number] => 09502690
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-22
[patent_title] => 'Organic light-emitting device and lighting device with organic resin and glass substrate'
[patent_app_type] => utility
[patent_app_number] => 13/327047
[patent_app_country] => US
[patent_app_date] => 2011-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 47
[patent_no_of_words] => 22148
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327047
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/327047 | Organic light-emitting device and lighting device with organic resin and glass substrate | Dec 14, 2011 | Issued |
Array
(
[id] => 8249010
[patent_doc_number] => 20120153334
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-21
[patent_title] => 'LED PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 13/327189
[patent_app_country] => US
[patent_app_date] => 2011-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2989
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20120153334.pdf
[firstpage_image] =>[orig_patent_app_number] => 13327189
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/327189 | LED package with recess and protrusions | Dec 14, 2011 | Issued |
Array
(
[id] => 8680845
[patent_doc_number] => 20130049129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/326170
[patent_app_country] => US
[patent_app_date] => 2011-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3485
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13326170
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/326170 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | Dec 13, 2011 | Abandoned |
Array
(
[id] => 8668978
[patent_doc_number] => 20130043516
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-21
[patent_title] => 'Semiconductor Device and Manufacturing Method Thereof'
[patent_app_type] => utility
[patent_app_number] => 13/326161
[patent_app_country] => US
[patent_app_date] => 2011-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4053
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13326161
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/326161 | Semiconductor device and manufacturing method involving multilayer contact etch stop | Dec 13, 2011 | Issued |
Array
(
[id] => 8049389
[patent_doc_number] => 20120074428
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-29
[patent_title] => 'SEMICONDUCTOR MODULE INCLUDING A SWITCH AND NON-CENTRAL DIODE'
[patent_app_type] => utility
[patent_app_number] => 13/311762
[patent_app_country] => US
[patent_app_date] => 2011-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6565
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0074/20120074428.pdf
[firstpage_image] =>[orig_patent_app_number] => 13311762
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/311762 | Semiconductor module including a switch and non-central diode | Dec 5, 2011 | Issued |
Array
(
[id] => 7762655
[patent_doc_number] => 20120032226
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-09
[patent_title] => 'Light Emitting Diode Submount with High Thermal Conductivity for High Power Operation'
[patent_app_type] => utility
[patent_app_number] => 13/271986
[patent_app_country] => US
[patent_app_date] => 2011-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6392
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0032/20120032226.pdf
[firstpage_image] =>[orig_patent_app_number] => 13271986
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/271986 | Light emitting diode submount with high thermal conductivity for high power operation | Oct 11, 2011 | Issued |
Array
(
[id] => 7733001
[patent_doc_number] => 20120015726
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-19
[patent_title] => 'ASYNCHRONOUS CHALLENGE GAMING'
[patent_app_type] => utility
[patent_app_number] => 13/244936
[patent_app_country] => US
[patent_app_date] => 2011-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5580
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0015/20120015726.pdf
[firstpage_image] =>[orig_patent_app_number] => 13244936
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/244936 | Asynchronous challenge gaming | Sep 25, 2011 | Issued |
Array
(
[id] => 7717120
[patent_doc_number] => 20120007187
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-12
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FORMING GATE AND METAL LINE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/242188
[patent_app_country] => US
[patent_app_date] => 2011-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 11492
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0007/20120007187.pdf
[firstpage_image] =>[orig_patent_app_number] => 13242188
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/242188 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING GATE AND METAL LINE THEREOF | Sep 22, 2011 | Abandoned |
Array
(
[id] => 7651424
[patent_doc_number] => 20110300693
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-08
[patent_title] => 'Semiconductor Devices'
[patent_app_type] => utility
[patent_app_number] => 13/207832
[patent_app_country] => US
[patent_app_date] => 2011-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 39
[patent_figures_cnt] => 39
[patent_no_of_words] => 8933
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0300/20110300693.pdf
[firstpage_image] =>[orig_patent_app_number] => 13207832
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/207832 | Semiconductor devices with connection patterns | Aug 10, 2011 | Issued |
Array
(
[id] => 8603905
[patent_doc_number] => 20130009217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-10
[patent_title] => 'Transistor, Method for Manufacturing Transistor, and Semiconductor Chip Comprising the Transistor'
[patent_app_type] => utility
[patent_app_number] => 13/378997
[patent_app_country] => US
[patent_app_date] => 2011-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5799
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13378997
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/378997 | Transistor with primary and semiconductor spacer, method for manufacturing transistor, and semiconductor chip comprising the transistor | Aug 8, 2011 | Issued |
Array
(
[id] => 10892854
[patent_doc_number] => 08916466
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-23
[patent_title] => 'Method for manufacturing dual damascene wiring in semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/067960
[patent_app_country] => US
[patent_app_date] => 2011-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 9586
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13067960
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/067960 | Method for manufacturing dual damascene wiring in semiconductor device | Jul 10, 2011 | Issued |
Array
(
[id] => 10089477
[patent_doc_number] => 09126285
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-08
[patent_title] => 'Laser and plasma etch wafer dicing using physically-removable mask'
[patent_app_type] => utility
[patent_app_number] => 13/161036
[patent_app_country] => US
[patent_app_date] => 2011-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 7418
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13161036
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/161036 | Laser and plasma etch wafer dicing using physically-removable mask | Jun 14, 2011 | Issued |
Array
(
[id] => 8522828
[patent_doc_number] => 20120322236
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-20
[patent_title] => 'WAFER DICING USING PULSE TRAIN LASER WITH MULTIPLE-PULSE BURSTS AND PLASMA ETCH'
[patent_app_type] => utility
[patent_app_number] => 13/161026
[patent_app_country] => US
[patent_app_date] => 2011-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7761
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13161026
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/161026 | Wafer dicing using pulse train laser with multiple-pulse bursts and plasma etch | Jun 14, 2011 | Issued |
Array
(
[id] => 6089438
[patent_doc_number] => 20110217812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-08
[patent_title] => 'INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING SAME WITH AN INTERPOSER SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 13/109825
[patent_app_country] => US
[patent_app_date] => 2011-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7765
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0217/20110217812.pdf
[firstpage_image] =>[orig_patent_app_number] => 13109825
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/109825 | INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING SAME WITH AN INTERPOSER SUBSTRATE | May 16, 2011 | Abandoned |
Array
(
[id] => 10544501
[patent_doc_number] => 09269634
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-23
[patent_title] => 'Self-aligned metal gate CMOS with metal base layer and dummy gate structure'
[patent_app_type] => utility
[patent_app_number] => 13/108138
[patent_app_country] => US
[patent_app_date] => 2011-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 2518
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13108138
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/108138 | Self-aligned metal gate CMOS with metal base layer and dummy gate structure | May 15, 2011 | Issued |
Array
(
[id] => 10022479
[patent_doc_number] => 09064974
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-23
[patent_title] => 'Barrier trench structure and methods of manufacture'
[patent_app_type] => utility
[patent_app_number] => 13/108144
[patent_app_country] => US
[patent_app_date] => 2011-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 5295
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13108144
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/108144 | Barrier trench structure and methods of manufacture | May 15, 2011 | Issued |
Array
(
[id] => 8486955
[patent_doc_number] => 20120286362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-15
[patent_title] => 'Semiconductor Structure and Circuit with Embedded Schottky Diode'
[patent_app_type] => utility
[patent_app_number] => 13/107405
[patent_app_country] => US
[patent_app_date] => 2011-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2789
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13107405
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/107405 | Semiconductor structure and circuit with embedded Schottky diode | May 12, 2011 | Issued |
Array
(
[id] => 8248957
[patent_doc_number] => 20120153283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-21
[patent_title] => 'Display Panel Structure of Electrophoretic Display Device, Display Device Structure, and Method for Manufacturing Display Device'
[patent_app_type] => utility
[patent_app_number] => 13/106882
[patent_app_country] => US
[patent_app_date] => 2011-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3817
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20120153283.pdf
[firstpage_image] =>[orig_patent_app_number] => 13106882
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/106882 | Display panel structure of electrophoretic display device with flat protection layer over active region and protection circuit region | May 12, 2011 | Issued |