
John P. Lacyk
Examiner (ID: 6851, Phone: (571)272-4728 , Office: P/3735 )
| Most Active Art Unit | 3735 |
| Art Unit(s) | 8300, 3736, 3791, 3311, 3305, 2899, 3735 |
| Total Applications | 2989 |
| Issued Applications | 2231 |
| Pending Applications | 277 |
| Abandoned Applications | 491 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19238178
[patent_doc_number] => 20240195373
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => TIA WITH TUNABLE GAIN
[patent_app_type] => utility
[patent_app_number] => 18/356462
[patent_app_country] => US
[patent_app_date] => 2023-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3636
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 18
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356462
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/356462 | TIA WITH TUNABLE GAIN | Jul 20, 2023 | Pending |
Array
(
[id] => 20010110
[patent_doc_number] => 20250148332
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => QUBIT READOUT PUMP SUPPRESSION METHOD
[patent_app_type] => utility
[patent_app_number] => 18/224411
[patent_app_country] => US
[patent_app_date] => 2023-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224411
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/224411 | QUBIT READOUT PUMP SUPPRESSION METHOD | Jul 19, 2023 | Pending |
Array
(
[id] => 18757523
[patent_doc_number] => 20230360986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => SEMICONDUCTOR STRUCTURE HAVING AN ANTI-ARCING PATTERN DISPOSED ON A PASSIVATION LAYER
[patent_app_type] => utility
[patent_app_number] => 18/352271
[patent_app_country] => US
[patent_app_date] => 2023-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7591
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352271
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/352271 | Semiconductor structure having an anti-arcing pattern disposed on a passivation layer | Jul 13, 2023 | Issued |
Array
(
[id] => 19237434
[patent_doc_number] => 20240194629
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => Semiconductor Device and Method of Making a Semiconductor Package with Graphene for Die Attach
[patent_app_type] => utility
[patent_app_number] => 18/351369
[patent_app_country] => US
[patent_app_date] => 2023-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7030
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351369
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/351369 | Semiconductor Device and Method of Making a Semiconductor Package with Graphene for Die Attach | Jul 11, 2023 | Pending |
Array
(
[id] => 18743454
[patent_doc_number] => 20230352442
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => Process Including a Re-etching Process for Forming a Semiconductor Structure
[patent_app_type] => utility
[patent_app_number] => 18/349696
[patent_app_country] => US
[patent_app_date] => 2023-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7879
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18349696
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/349696 | Semiconductor structure having a conductive feature comprising an adhesion layer and a metal region over and contacting the adhesion layer | Jul 9, 2023 | Issued |
Array
(
[id] => 18744121
[patent_doc_number] => 20230353109
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => OPERATIONAL AMPLIFIER, DRIVE CIRCUIT, INTERFACE CHIP, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/345921
[patent_app_country] => US
[patent_app_date] => 2023-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12097
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18345921
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/345921 | OPERATIONAL AMPLIFIER, DRIVE CIRCUIT, INTERFACE CHIP, AND ELECTRONIC DEVICE | Jun 29, 2023 | Pending |
Array
(
[id] => 18758264
[patent_doc_number] => 20230361735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => COMMON ADJUSTMENT CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/344482
[patent_app_country] => US
[patent_app_date] => 2023-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8605
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18344482
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/344482 | Common adjustment circuit | Jun 28, 2023 | Issued |
Array
(
[id] => 19305808
[patent_doc_number] => 20240234388
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/215212
[patent_app_country] => US
[patent_app_date] => 2023-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7524
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18215212
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/215212 | SEMICONDUCTOR PACKAGE | Jun 27, 2023 | Pending |
Array
(
[id] => 19305808
[patent_doc_number] => 20240234388
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/215212
[patent_app_country] => US
[patent_app_date] => 2023-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7524
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18215212
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/215212 | SEMICONDUCTOR PACKAGE | Jun 26, 2023 | Pending |
Array
(
[id] => 19688932
[patent_doc_number] => 20250007477
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-02
[patent_title] => Active Inductor Peaking Buffer with Output Common Mode Control
[patent_app_type] => utility
[patent_app_number] => 18/341989
[patent_app_country] => US
[patent_app_date] => 2023-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4044
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341989
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/341989 | Active Inductor Peaking Buffer with Output Common Mode Control | Jun 26, 2023 | Pending |
Array
(
[id] => 18991224
[patent_doc_number] => 20240063193
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/210958
[patent_app_country] => US
[patent_app_date] => 2023-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19789
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 307
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18210958
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/210958 | Semiconductor package | Jun 15, 2023 | Issued |
Array
(
[id] => 18712891
[patent_doc_number] => 20230335524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => INTEGRATED CIRCUIT AND ELECTRONIC DEVICE COMPRISING A PLURALITY OF INTEGRATED CIRCUITS ELECTRICALLY COUPLED THROUGH A SYNCHRONIZATION SIGNAL
[patent_app_type] => utility
[patent_app_number] => 18/334280
[patent_app_country] => US
[patent_app_date] => 2023-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5347
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18334280
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/334280 | Integrated circuit and electronic device comprising a plurality of integrated circuits electrically coupled through a synchronization signal | Jun 12, 2023 | Issued |
Array
(
[id] => 19635352
[patent_doc_number] => 20240413801
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => VOLTAGE-MODE FILTERS WITH OUTPUT IMPEDANCE NEUTRALIZATION
[patent_app_type] => utility
[patent_app_number] => 18/330429
[patent_app_country] => US
[patent_app_date] => 2023-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 24721
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18330429
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/330429 | VOLTAGE-MODE FILTERS WITH OUTPUT IMPEDANCE NEUTRALIZATION | Jun 6, 2023 | Pending |
Array
(
[id] => 18679993
[patent_doc_number] => 20230317651
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-05
[patent_title] => PREVENTION OF METAL PAD CORROSION DUE TO EXPOSURE TO HALOGEN
[patent_app_type] => utility
[patent_app_number] => 18/329128
[patent_app_country] => US
[patent_app_date] => 2023-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6320
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18329128
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/329128 | Semiconductor device having a metal pad and a protective layer for corrosion prevention due to exposure to halogen | Jun 4, 2023 | Issued |
Array
(
[id] => 18866673
[patent_doc_number] => 20230421110
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => ANALOG PREDISTORTION (APD) SYSTEM FOR POWER AMPLIFIERS
[patent_app_type] => utility
[patent_app_number] => 18/203831
[patent_app_country] => US
[patent_app_date] => 2023-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4159
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203831
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/203831 | ANALOG PREDISTORTION (APD) SYSTEM FOR POWER AMPLIFIERS | May 30, 2023 | Pending |
Array
(
[id] => 20566237
[patent_doc_number] => 12568864
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-03
[patent_title] => Stacked package structure including a chip disposed on a redistribution layer and a molding layer comprises a recess
[patent_app_type] => utility
[patent_app_number] => 18/203668
[patent_app_country] => US
[patent_app_date] => 2023-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 19
[patent_no_of_words] => 4488
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203668
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/203668 | Stacked package structure including a chip disposed on a redistribution layer and a molding layer comprises a recess | May 30, 2023 | Issued |
Array
(
[id] => 19469103
[patent_doc_number] => 20240322773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => MULTI-STAGE, FULLY-DIFFERENTIAL CLASS-AB AMPLIFIER
[patent_app_type] => utility
[patent_app_number] => 18/202679
[patent_app_country] => US
[patent_app_date] => 2023-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8008
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18202679
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/202679 | Multi-stage, fully-differential class-AB amplifier | May 25, 2023 | Issued |
Array
(
[id] => 19054808
[patent_doc_number] => 20240096777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/323646
[patent_app_country] => US
[patent_app_date] => 2023-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6216
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323646
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/323646 | SEMICONDUCTOR PACKAGE | May 24, 2023 | Pending |
Array
(
[id] => 19237368
[patent_doc_number] => 20240194563
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING SAME
[patent_app_type] => utility
[patent_app_number] => 18/201466
[patent_app_country] => US
[patent_app_date] => 2023-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5842
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18201466
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/201466 | Semiconductor package including a plurality of heat dissipation reinforcements and method for fabricating same | May 23, 2023 | Issued |
Array
(
[id] => 18813533
[patent_doc_number] => 20230387870
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => HYBRID CLASS-D AMPLIFIER
[patent_app_type] => utility
[patent_app_number] => 18/200593
[patent_app_country] => US
[patent_app_date] => 2023-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4750
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18200593
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/200593 | HYBRID CLASS-D AMPLIFIER | May 22, 2023 | Pending |