Search

John P. Trimmings

Examiner (ID: 12550)

Most Active Art Unit
2117
Art Unit(s)
2117, 2133, 2138
Total Applications
878
Issued Applications
745
Pending Applications
10
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 325283 [patent_doc_number] => 07519889 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-04-14 [patent_title] => 'System and method to reduce LBIST manufacturing test time of integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/060339 [patent_app_country] => US [patent_app_date] => 2008-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3911 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/519/07519889.pdf [firstpage_image] =>[orig_patent_app_number] => 12060339 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/060339
System and method to reduce LBIST manufacturing test time of integrated circuits Mar 31, 2008 Issued
Array ( [id] => 4956560 [patent_doc_number] => 20080189584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'SYSTEM AND APPARATUS FOR IMPROVING LOGICAL BUILT-IN SELF TEST (LBIST) AC FAULT ISOLATIONS' [patent_app_type] => utility [patent_app_number] => 12/060405 [patent_app_country] => US [patent_app_date] => 2008-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4138 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20080189584.pdf [firstpage_image] =>[orig_patent_app_number] => 12060405 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/060405
SYSTEM AND APPARATUS FOR IMPROVING LOGICAL BUILT-IN SELF TEST (LBIST) AC FAULT ISOLATIONS Mar 31, 2008 Abandoned
Array ( [id] => 4508748 [patent_doc_number] => 07958438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'CAN system' [patent_app_type] => utility [patent_app_number] => 12/076980 [patent_app_country] => US [patent_app_date] => 2008-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11181 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/958/07958438.pdf [firstpage_image] =>[orig_patent_app_number] => 12076980 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/076980
CAN system Mar 25, 2008 Issued
Array ( [id] => 193000 [patent_doc_number] => 07644327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'System and method of providing error detection and correction capability in an integrated circuit using redundant logic cells of an embedded FPGA' [patent_app_type] => utility [patent_app_number] => 12/049166 [patent_app_country] => US [patent_app_date] => 2008-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3281 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/644/07644327.pdf [firstpage_image] =>[orig_patent_app_number] => 12049166 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/049166
System and method of providing error detection and correction capability in an integrated circuit using redundant logic cells of an embedded FPGA Mar 13, 2008 Issued
Array ( [id] => 4449043 [patent_doc_number] => 07865795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Methods and apparatuses for generating a random sequence of commands for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/039292 [patent_app_country] => US [patent_app_date] => 2008-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4076 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/865/07865795.pdf [firstpage_image] =>[orig_patent_app_number] => 12039292 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/039292
Methods and apparatuses for generating a random sequence of commands for a semiconductor device Feb 27, 2008 Issued
Array ( [id] => 5516803 [patent_doc_number] => 20090217110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT INVOLVING ERROR THRESHOLDS' [patent_app_type] => utility [patent_app_number] => 12/036697 [patent_app_country] => US [patent_app_date] => 2008-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2870 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20090217110.pdf [firstpage_image] =>[orig_patent_app_number] => 12036697 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/036697
Method, system and computer program product involving error thresholds Feb 24, 2008 Issued
Array ( [id] => 5516805 [patent_doc_number] => 20090217112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'AC ABIST Diagnostic Method, Apparatus and Program Product' [patent_app_type] => utility [patent_app_number] => 12/035515 [patent_app_country] => US [patent_app_date] => 2008-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5963 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20090217112.pdf [firstpage_image] =>[orig_patent_app_number] => 12035515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/035515
AC ABIST diagnostic method, apparatus and program product Feb 21, 2008 Issued
Array ( [id] => 4600764 [patent_doc_number] => 07984350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-19 [patent_title] => 'Logic circuitry and recording medium' [patent_app_type] => utility [patent_app_number] => 12/035884 [patent_app_country] => US [patent_app_date] => 2008-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4191 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/984/07984350.pdf [firstpage_image] =>[orig_patent_app_number] => 12035884 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/035884
Logic circuitry and recording medium Feb 21, 2008 Issued
Array ( [id] => 5393433 [patent_doc_number] => 20090210746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'GENERATING TEST COVERAGE BIN BASED ON SIMULATION RESULT' [patent_app_type] => utility [patent_app_number] => 12/033239 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4246 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20090210746.pdf [firstpage_image] =>[orig_patent_app_number] => 12033239 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/033239
Generating test coverage bin based on simulation result Feb 18, 2008 Issued
Array ( [id] => 5393448 [patent_doc_number] => 20090210761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'AC Scan Diagnostic Method and Apparatus Utilizing Functional Architecture Verification Patterns' [patent_app_type] => utility [patent_app_number] => 12/031930 [patent_app_country] => US [patent_app_date] => 2008-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4932 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20090210761.pdf [firstpage_image] =>[orig_patent_app_number] => 12031930 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/031930
AC Scan Diagnostic Method and Apparatus Utilizing Functional Architecture Verification Patterns Feb 14, 2008 Abandoned
Array ( [id] => 4522841 [patent_doc_number] => 07917821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'System-on-chip performing multi-phase scan chain and method thereof' [patent_app_type] => utility [patent_app_number] => 12/071106 [patent_app_country] => US [patent_app_date] => 2008-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3277 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/917/07917821.pdf [firstpage_image] =>[orig_patent_app_number] => 12071106 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/071106
System-on-chip performing multi-phase scan chain and method thereof Feb 14, 2008 Issued
Array ( [id] => 5381476 [patent_doc_number] => 20090193315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'System for a Combined Error Correction Code and Cyclic Redundancy Check Code for a Memory Channel' [patent_app_type] => utility [patent_app_number] => 12/018926 [patent_app_country] => US [patent_app_date] => 2008-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20090193315.pdf [firstpage_image] =>[orig_patent_app_number] => 12018926 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/018926
System for a combined error correction code and cyclic redundancy check code for a memory channel Jan 23, 2008 Issued
Array ( [id] => 8787129 [patent_doc_number] => 08433984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'LDPC encoding and decoding of packets of variable sizes' [patent_app_type] => utility [patent_app_number] => 12/018959 [patent_app_country] => US [patent_app_date] => 2008-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 9075 [patent_no_of_claims] => 124 [patent_no_of_ind_claims] => 24 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12018959 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/018959
LDPC encoding and decoding of packets of variable sizes Jan 23, 2008 Issued
Array ( [id] => 5381472 [patent_doc_number] => 20090193311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'RETRANSMISSION OF ERRONEOUS DATA' [patent_app_type] => utility [patent_app_number] => 12/018932 [patent_app_country] => US [patent_app_date] => 2008-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4162 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20090193311.pdf [firstpage_image] =>[orig_patent_app_number] => 12018932 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/018932
Retransmission of erroneous data Jan 23, 2008 Issued
Array ( [id] => 4766847 [patent_doc_number] => 20080178059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'Method of enhancing information security in a wireless communications system and related apparatus' [patent_app_type] => utility [patent_app_number] => 12/010284 [patent_app_country] => US [patent_app_date] => 2008-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1994 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20080178059.pdf [firstpage_image] =>[orig_patent_app_number] => 12010284 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/010284
Method of enhancing information security in a wireless communications system and related apparatus Jan 22, 2008 Abandoned
Array ( [id] => 7982797 [patent_doc_number] => 08074157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-06 [patent_title] => 'Methods and apparatus for reduced complexity soft-output viterbi detection' [patent_app_type] => utility [patent_app_number] => 12/017547 [patent_app_country] => US [patent_app_date] => 2008-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5295 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/074/08074157.pdf [firstpage_image] =>[orig_patent_app_number] => 12017547 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017547
Methods and apparatus for reduced complexity soft-output viterbi detection Jan 21, 2008 Issued
Array ( [id] => 7780068 [patent_doc_number] => 08122320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Integrated circuit including an ECC error counter' [patent_app_type] => utility [patent_app_number] => 12/017607 [patent_app_country] => US [patent_app_date] => 2008-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122320.pdf [firstpage_image] =>[orig_patent_app_number] => 12017607 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017607
Integrated circuit including an ECC error counter Jan 21, 2008 Issued
Array ( [id] => 8022855 [patent_doc_number] => 08140946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Method and apparatus for generating low rate turbo codes' [patent_app_type] => utility [patent_app_number] => 12/017219 [patent_app_country] => US [patent_app_date] => 2008-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5435 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/140/08140946.pdf [firstpage_image] =>[orig_patent_app_number] => 12017219 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017219
Method and apparatus for generating low rate turbo codes Jan 20, 2008 Issued
Array ( [id] => 4766854 [patent_doc_number] => 20080178066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'Method and apparatus for receiving data in communication system' [patent_app_type] => utility [patent_app_number] => 12/009435 [patent_app_country] => US [patent_app_date] => 2008-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9422 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20080178066.pdf [firstpage_image] =>[orig_patent_app_number] => 12009435 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/009435
Method and apparatus for receiving data in communication system Jan 17, 2008 Abandoned
Array ( [id] => 4874891 [patent_doc_number] => 20080201625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'ERROR CORRECTION SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/016577 [patent_app_country] => US [patent_app_date] => 2008-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4255 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20080201625.pdf [firstpage_image] =>[orig_patent_app_number] => 12016577 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/016577
Error correction system and method Jan 17, 2008 Issued
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