John P. Trimmings

Array ( [id] => 8331644 [patent_doc_number] => 08239726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Apparatuses and methods for encoding and decoding' [patent_app_type] => utility [patent_app_number] => 12/010025 [patent_app_country] => US [patent_app_date] => 2008-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8862 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12010025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7537722 [patent_doc_number] => 08051365 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-11-01 [patent_title] => 'Viterbi decoder method and apparatus with RI detector in servo channel detector in servo channel' [patent_app_type] => utility [patent_app_number] => 12/015913 [patent_app_country] => US [patent_app_date] => 2008-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 43 [patent_no_of_words] => 14563 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/051/08051365.pdf [firstpage_image] =>[orig_patent_app_number] => 12015913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4766846 [patent_doc_number] => 20080178058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'Decoding apparatus and method' [patent_app_type] => utility [patent_app_number] => 12/009413 [patent_app_country] => US [patent_app_date] => 2008-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2975 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20080178058.pdf [firstpage_image] =>[orig_patent_app_number] => 12009413 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4815273 [patent_doc_number] => 20080195904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Test Point Insertion and Scan Chain Reordering for Broadcast-Scan Based Compression' [patent_app_type] => utility [patent_app_number] => 12/015129 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7905 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20080195904.pdf [firstpage_image] =>[orig_patent_app_number] => 12015129 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7532635 [patent_doc_number] => 07844869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Implementing enhanced LBIST testing of paths including arrays' [patent_app_type] => utility [patent_app_number] => 12/015254 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3501 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/844/07844869.pdf [firstpage_image] =>[orig_patent_app_number] => 12015254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7517945 [patent_doc_number] => 08042027 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-10-18 [patent_title] => 'BM/LLR computation for multi-dimensional TCM/BCM' [patent_app_type] => utility [patent_app_number] => 12/014556 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 28 [patent_no_of_words] => 13578 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/042/08042027.pdf [firstpage_image] =>[orig_patent_app_number] => 12014556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7768344 [patent_doc_number] => 08117519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Memory apparatus and method using erasure error correction to reduce power consumption' [patent_app_type] => utility [patent_app_number] => 12/014598 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 7216 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/117/08117519.pdf [firstpage_image] =>[orig_patent_app_number] => 12014598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19067 [patent_doc_number] => 07810006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-05 [patent_title] => 'Testing system for a device under test' [patent_app_type] => utility [patent_app_number] => 12/013592 [patent_app_country] => US [patent_app_date] => 2008-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3394 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/810/07810006.pdf [firstpage_image] =>[orig_patent_app_number] => 12013592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5347740 [patent_doc_number] => 20090003101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'APPARATUS AND METHOD OF SETTING TEST MODE IN SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/013866 [patent_app_country] => US [patent_app_date] => 2008-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4211 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20090003101.pdf [firstpage_image] =>[orig_patent_app_number] => 12013866 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7686439 [patent_doc_number] => 20090177852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-09 [patent_title] => 'DATA BLOCK RECEIVER AND METHOD FOR DECODING DATA BLOCK' [patent_app_type] => utility [patent_app_number] => 11/971233 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3553 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20090177852.pdf [firstpage_image] =>[orig_patent_app_number] => 11971233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4793983 [patent_doc_number] => 20080294957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'Communication Apparatus' [patent_app_type] => utility [patent_app_number] => 11/970791 [patent_app_country] => US [patent_app_date] => 2008-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1047 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20080294957.pdf [firstpage_image] =>[orig_patent_app_number] => 11970791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4592866 [patent_doc_number] => 07853842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Semiconductor memory device with ZQ calibration' [patent_app_type] => utility [patent_app_number] => 11/967528 [patent_app_country] => US [patent_app_date] => 2007-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4191 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/853/07853842.pdf [firstpage_image] =>[orig_patent_app_number] => 11967528 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4754955 [patent_doc_number] => 20080163031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'METHOD OF FACILITATING RELIABLY ACCESSING FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 11/965076 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3241 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20080163031.pdf [firstpage_image] =>[orig_patent_app_number] => 11965076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 268612 [patent_doc_number] => 07568141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-28 [patent_title] => 'Method and apparatus for testing embedded cores' [patent_app_type] => utility [patent_app_number] => 11/963689 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2933 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/568/07568141.pdf [firstpage_image] =>[orig_patent_app_number] => 11963689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 27457 [patent_doc_number] => 07802160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Test apparatus and calibration method' [patent_app_type] => utility [patent_app_number] => 11/951335 [patent_app_country] => US [patent_app_date] => 2007-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5634 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/802/07802160.pdf [firstpage_image] =>[orig_patent_app_number] => 11951335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 48953 [patent_doc_number] => 07779316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Method of testing memory array at operational speed using scan' [patent_app_type] => utility [patent_app_number] => 11/950578 [patent_app_country] => US [patent_app_date] => 2007-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3441 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/779/07779316.pdf [firstpage_image] =>[orig_patent_app_number] => 11950578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4616617 [patent_doc_number] => 07992070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Bit-interleaved LDPC-coded modulation for high-speed optical transmission' [patent_app_type] => utility [patent_app_number] => 11/950757 [patent_app_country] => US [patent_app_date] => 2007-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4679 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/992/07992070.pdf [firstpage_image] =>[orig_patent_app_number] => 11950757 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4511159 [patent_doc_number] => 07949915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Method and apparatus for describing parallel access to a system-on-chip' [patent_app_type] => utility [patent_app_number] => 11/950212 [patent_app_country] => US [patent_app_date] => 2007-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 25630 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/949/07949915.pdf [firstpage_image] =>[orig_patent_app_number] => 11950212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6511236 [patent_doc_number] => 20100011260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-14 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/513860 [patent_app_country] => US [patent_app_date] => 2007-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6727 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20100011260.pdf [firstpage_image] =>[orig_patent_app_number] => 12513860 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5280756 [patent_doc_number] => 20090132888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'RELIABILITY, AVAILABILITY, AND SERVICEABILITY SOLUTIONS FOR MEMORY TECHNOLOGY' [patent_app_type] => utility [patent_app_number] => 11/942621 [patent_app_country] => US [patent_app_date] => 2007-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3431 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20090132888.pdf [firstpage_image] =>[orig_patent_app_number] => 11942621 [rel_patent_id] =>[rel_patent_doc_number] =>)