
John P. Trimmings
Examiner (ID: 19222)
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2117, 2133, 2138 |
| Total Applications | 878 |
| Issued Applications | 745 |
| Pending Applications | 10 |
| Abandoned Applications | 127 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8906467
[patent_doc_number] => 20130173970
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-04
[patent_title] => 'MEMORY DEVICE WITH BACKGROUND BUILT-IN SELF-TESTING AND BACKGROUND BUILT-IN SELF-REPAIR'
[patent_app_type] => utility
[patent_app_number] => 13/732783
[patent_app_country] => US
[patent_app_date] => 2013-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 20791
[patent_no_of_claims] => 85
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13732783
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/732783 | Memory device with background built-in self-testing and background built-in self-repair | Jan 1, 2013 | Issued |
Array
(
[id] => 9221637
[patent_doc_number] => 20140016412
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-16
[patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS, DATA TRANSMISSION DEVICE, AND RECORDING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/722361
[patent_app_country] => US
[patent_app_date] => 2012-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7918
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13722361
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/722361 | Semiconductor memory apparatus, data transmission device, and recording method | Dec 19, 2012 | Issued |
Array
(
[id] => 8769334
[patent_doc_number] => 20130097371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-18
[patent_title] => 'DISABLING OUTBOUND DRIVERS FOR A LAST MEMORY BUFFER ON A MEMORY CHANNEL'
[patent_app_type] => utility
[patent_app_number] => 13/692355
[patent_app_country] => US
[patent_app_date] => 2012-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 12256
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13692355
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/692355 | Disabling outbound drivers for a last memory buffer on a memory channel | Dec 2, 2012 | Issued |
Array
(
[id] => 9248535
[patent_doc_number] => 08612837
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-12-17
[patent_title] => 'BM/LLR computations for multi-dimensional TCM/BCM codes'
[patent_app_type] => utility
[patent_app_number] => 13/686323
[patent_app_country] => US
[patent_app_date] => 2012-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 28
[patent_no_of_words] => 13579
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686323
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/686323 | BM/LLR computations for multi-dimensional TCM/BCM codes | Nov 26, 2012 | Issued |
Array
(
[id] => 9218485
[patent_doc_number] => 08631295
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-14
[patent_title] => 'Error concealment'
[patent_app_type] => utility
[patent_app_number] => 13/682073
[patent_app_country] => US
[patent_app_date] => 2012-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 9030
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13682073
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/682073 | Error concealment | Nov 19, 2012 | Issued |
Array
(
[id] => 9493217
[patent_doc_number] => 20140143623
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-22
[patent_title] => 'METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION'
[patent_app_type] => utility
[patent_app_number] => 13/681968
[patent_app_country] => US
[patent_app_date] => 2012-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 6542
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13681968
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/681968 | METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION | Nov 19, 2012 | Abandoned |
Array
(
[id] => 8722714
[patent_doc_number] => 20130073931
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-21
[patent_title] => 'OPTIMIZATION OF PACKET BUFFER MEMORY UTILIZATION'
[patent_app_type] => utility
[patent_app_number] => 13/679026
[patent_app_country] => US
[patent_app_date] => 2012-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 15193
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13679026
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/679026 | Optimization of packet buffer memory utilization | Nov 15, 2012 | Issued |
Array
(
[id] => 9062908
[patent_doc_number] => 08549362
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-01
[patent_title] => 'Memory device'
[patent_app_type] => utility
[patent_app_number] => 13/617370
[patent_app_country] => US
[patent_app_date] => 2012-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4118
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13617370
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/617370 | Memory device | Sep 13, 2012 | Issued |
Array
(
[id] => 8568785
[patent_doc_number] => 20120331356
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-27
[patent_title] => 'DISABLING OUTBOUND DRIVERS FOR A LAST MEMORY BUFFER ON A MEMORY CHANNEL'
[patent_app_type] => utility
[patent_app_number] => 13/606339
[patent_app_country] => US
[patent_app_date] => 2012-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 12256
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13606339
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/606339 | Disabling outbound drivers for a last memory buffer on a memory channel | Sep 6, 2012 | Issued |
Array
(
[id] => 8810351
[patent_doc_number] => 08448018
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-21
[patent_title] => 'Stripe-based memory operation'
[patent_app_type] => utility
[patent_app_number] => 13/605124
[patent_app_country] => US
[patent_app_date] => 2012-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9473
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13605124
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/605124 | Stripe-based memory operation | Sep 5, 2012 | Issued |
Array
(
[id] => 9974301
[patent_doc_number] => 09021338
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-28
[patent_title] => 'Memory system and data storage method'
[patent_app_type] => utility
[patent_app_number] => 13/604772
[patent_app_country] => US
[patent_app_date] => 2012-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 30
[patent_no_of_words] => 13015
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604772
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/604772 | Memory system and data storage method | Sep 5, 2012 | Issued |
Array
(
[id] => 9044229
[patent_doc_number] => 20130246867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-19
[patent_title] => 'TEST CIRCUIT, MEMORY SYSTEM, AND TEST METHOD OF MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/603597
[patent_app_country] => US
[patent_app_date] => 2012-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7765
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603597
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/603597 | Test circuit, memory system, and test method of memory system | Sep 4, 2012 | Issued |
Array
(
[id] => 9271094
[patent_doc_number] => 20140026012
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-23
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/602413
[patent_app_country] => US
[patent_app_date] => 2012-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4550
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602413
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/602413 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME | Sep 3, 2012 | Abandoned |
Array
(
[id] => 9886046
[patent_doc_number] => 08972832
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-03
[patent_title] => 'Optimized scheme and architecture of hard drive queue design'
[patent_app_type] => utility
[patent_app_number] => 13/603104
[patent_app_country] => US
[patent_app_date] => 2012-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 17
[patent_no_of_words] => 3334
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603104
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/603104 | Optimized scheme and architecture of hard drive queue design | Sep 3, 2012 | Issued |
Array
(
[id] => 9341597
[patent_doc_number] => 20140068381
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'LDPC Decoder Irregular Decoding of Regular Codes'
[patent_app_type] => utility
[patent_app_number] => 13/602535
[patent_app_country] => US
[patent_app_date] => 2012-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10385
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602535
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/602535 | LDPC decoder irregular decoding of regular codes | Sep 3, 2012 | Issued |
| 13/602265 | SEMICONDUCTOR APPARATUS | Sep 2, 2012 | Abandoned |
Array
(
[id] => 8878845
[patent_doc_number] => 08473830
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-06-25
[patent_title] => 'Viterbi decoder method and apparatus with RI detector in servo channel'
[patent_app_type] => utility
[patent_app_number] => 13/601404
[patent_app_country] => US
[patent_app_date] => 2012-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 43
[patent_no_of_words] => 14620
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13601404
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/601404 | Viterbi decoder method and apparatus with RI detector in servo channel | Aug 30, 2012 | Issued |
Array
(
[id] => 10873326
[patent_doc_number] => 08898548
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-11-25
[patent_title] => 'Methods, data storage devices and systems having variable size ECC page size'
[patent_app_type] => utility
[patent_app_number] => 13/594696
[patent_app_country] => US
[patent_app_date] => 2012-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 8253
[patent_no_of_claims] => 54
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13594696
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/594696 | Methods, data storage devices and systems having variable size ECC page size | Aug 23, 2012 | Issued |
Array
(
[id] => 9193476
[patent_doc_number] => 20130332791
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-12
[patent_title] => 'DATA PROTECTION METHOD, AND MEMORY CONTROLLER AND MEMORY STORAGE DEVICE USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/591236
[patent_app_country] => US
[patent_app_date] => 2012-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5737
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13591236
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/591236 | Data protection method, and memory controller and memory storage device using the same | Aug 21, 2012 | Issued |
Array
(
[id] => 9320710
[patent_doc_number] => 20140053049
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-20
[patent_title] => 'METHODS AND APPARATUSES FOR SAVING POWER DURING TRANSPORT BLOCK DECODING IN UMTS SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 13/589651
[patent_app_country] => US
[patent_app_date] => 2012-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 13041
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589651
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/589651 | Methods and apparatuses for saving power during transport block decoding in UMTS systems | Aug 19, 2012 | Issued |