Search

John Patrick Darling

Examiner (ID: 11329)

Most Active Art Unit
2405
Art Unit(s)
2405, 3503, 3631, 3653
Total Applications
945
Issued Applications
824
Pending Applications
24
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12314637 [patent_doc_number] => 09941265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Circuitry with voltage limiting and capactive enhancement [patent_app_type] => utility [patent_app_number] => 15/200308 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5336 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15200308 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/200308
Circuitry with voltage limiting and capactive enhancement Jun 30, 2016 Issued
Array ( [id] => 12122499 [patent_doc_number] => 20180006085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/200481 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15200481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/200481
Semiconductor memory device and method for fabricating the same Jun 30, 2016 Issued
Array ( [id] => 12122344 [patent_doc_number] => 20180005930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'FAN-OUT PACKAGE STRUCTURE AND METHOD' [patent_app_type] => utility [patent_app_number] => 15/200505 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5459 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15200505 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/200505
Fan-out package structure and method Jun 30, 2016 Issued
Array ( [id] => 13111941 [patent_doc_number] => 10074628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => System-in-package and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 15/182613 [patent_app_country] => US [patent_app_date] => 2016-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 5156 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15182613 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/182613
System-in-package and fabrication method thereof Jun 14, 2016 Issued
Array ( [id] => 12953902 [patent_doc_number] => 09837445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Display device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 15/177364 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 9865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15177364 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/177364
Display device and method for fabricating the same Jun 8, 2016 Issued
Array ( [id] => 13695305 [patent_doc_number] => 20170358607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => METHODS FOR FORMING HYBRID VERTICAL TRANSISTORS [patent_app_type] => utility [patent_app_number] => 15/177941 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15177941 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/177941
Methods for forming hybrid vertical transistors Jun 8, 2016 Issued
Array ( [id] => 14036353 [patent_doc_number] => 10229933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Flexible display including metal layer formed in opening of insulating layer [patent_app_type] => utility [patent_app_number] => 15/178429 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15178429 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/178429
Flexible display including metal layer formed in opening of insulating layer Jun 8, 2016 Issued
Array ( [id] => 11645099 [patent_doc_number] => 09666490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Multi-layer semiconductor structures for fabricating inverter chains' [patent_app_type] => utility [patent_app_number] => 15/174021 [patent_app_country] => US [patent_app_date] => 2016-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 112 [patent_no_of_words] => 5982 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15174021 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/174021
Multi-layer semiconductor structures for fabricating inverter chains Jun 5, 2016 Issued
Array ( [id] => 11725237 [patent_doc_number] => 09698102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Power and ground routing of integrated circuit devices with improved IR drop and chip performance' [patent_app_type] => utility [patent_app_number] => 15/168519 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6205 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/168519
Power and ground routing of integrated circuit devices with improved IR drop and chip performance May 30, 2016 Issued
Array ( [id] => 12936346 [patent_doc_number] => 09831347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Semiconductor device comprising a transistor and a capacitor [patent_app_type] => utility [patent_app_number] => 15/161329 [patent_app_country] => US [patent_app_date] => 2016-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 152 [patent_no_of_words] => 52835 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15161329 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/161329
Semiconductor device comprising a transistor and a capacitor May 22, 2016 Issued
Array ( [id] => 11273949 [patent_doc_number] => 20160336496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'LIGHT-EMITTING ELEMENT' [patent_app_type] => utility [patent_app_number] => 15/153465 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 21303 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15153465 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/153465
Light emitting element with light transmissive substrate having recess in cross-sectional plane May 11, 2016 Issued
Array ( [id] => 11273730 [patent_doc_number] => 20160336277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/153727 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 24155 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15153727 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/153727
Semiconductor device and method for manufacturing the same May 11, 2016 Issued
Array ( [id] => 12615573 [patent_doc_number] => 20180097021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => TFT ARRAY SUBSTRATE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 15/109654 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15109654 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/109654
TFT array substrate and method of forming the same May 11, 2016 Issued
Array ( [id] => 11057280 [patent_doc_number] => 20160254242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/152274 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152274 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152274
Semiconductor structure and manufacturing method thereof May 10, 2016 Issued
Array ( [id] => 13122023 [patent_doc_number] => 10079369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-18 [patent_title] => OLED display panel and manufacture method thereof [patent_app_type] => utility [patent_app_number] => 15/106827 [patent_app_country] => US [patent_app_date] => 2016-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2790 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15106827 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/106827
OLED display panel and manufacture method thereof May 3, 2016 Issued
Array ( [id] => 11050836 [patent_doc_number] => 20160247795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'AVALANCHE ENERGY HANDLING CAPABLE III-NITRIDE TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 15/144104 [patent_app_country] => US [patent_app_date] => 2016-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144104 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/144104
Method of forming a semiconductor device having a GaNFET, an overvoltage clamping component, and a voltage dropping component May 1, 2016 Issued
Array ( [id] => 13211771 [patent_doc_number] => 10120252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-06 [patent_title] => Array substrate and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/123064 [patent_app_country] => US [patent_app_date] => 2016-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2756 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15123064 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/123064
Array substrate and manufacturing method thereof Apr 27, 2016 Issued
Array ( [id] => 11453285 [patent_doc_number] => 09576937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Back-to-back stacked integrated circuit assembly' [patent_app_type] => utility [patent_app_number] => 15/130721 [patent_app_country] => US [patent_app_date] => 2016-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 5582 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15130721 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/130721
Back-to-back stacked integrated circuit assembly Apr 14, 2016 Issued
Array ( [id] => 14152073 [patent_doc_number] => 10256426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Thin-film transistor array panel and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/114864 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4709 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15114864 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/114864
Thin-film transistor array panel and manufacturing method thereof Mar 31, 2016 Issued
Array ( [id] => 11014255 [patent_doc_number] => 20160211208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME' [patent_app_type] => utility [patent_app_number] => 15/082501 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15082501 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/082501
Electrical interconnect for an integrated circuit package and method of making same Mar 27, 2016 Issued
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