Search

John Patrick Mccormack

Examiner (ID: 13994, Phone: (571)270-7472 , Office: P/3743 )

Most Active Art Unit
3762
Art Unit(s)
3743, 3762
Total Applications
903
Issued Applications
628
Pending Applications
48
Abandoned Applications
239

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19055065 [patent_doc_number] => 20240097034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => METHOD FOR FABRICATING A STRAINED STRUCTURE AND STRUCTURE FORMED [patent_app_type] => utility [patent_app_number] => 18/522461 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522461
Method for fabricating a strained structure and structure formed Nov 28, 2023 Issued
Array ( [id] => 20760265 [patent_doc_number] => 12653061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Package structure and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/520467 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 5467 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520467 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520467
PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME Nov 26, 2023 Issued
Array ( [id] => 19038270 [patent_doc_number] => 20240088085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/516753 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516753 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516753
PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME Nov 20, 2023 Pending
Array ( [id] => 20082543 [patent_doc_number] => 12356640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => High-K capacitor dielectric having a metal oxide area comprising boron, electrical device and semiconductor apparatus including the same [patent_app_type] => utility [patent_app_number] => 18/512648 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8172 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512648 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512648
High-K capacitor dielectric having a metal oxide area comprising boron, electrical device and semiconductor apparatus including the same Nov 16, 2023 Issued
Array ( [id] => 20082543 [patent_doc_number] => 12356640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => High-K capacitor dielectric having a metal oxide area comprising boron, electrical device and semiconductor apparatus including the same [patent_app_type] => utility [patent_app_number] => 18/512648 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8172 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512648 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512648
High-K capacitor dielectric having a metal oxide area comprising boron, electrical device and semiconductor apparatus including the same Nov 16, 2023 Issued
Array ( [id] => 20082543 [patent_doc_number] => 12356640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => High-K capacitor dielectric having a metal oxide area comprising boron, electrical device and semiconductor apparatus including the same [patent_app_type] => utility [patent_app_number] => 18/512648 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8172 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512648 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512648
High-K capacitor dielectric having a metal oxide area comprising boron, electrical device and semiconductor apparatus including the same Nov 16, 2023 Issued
Array ( [id] => 20082543 [patent_doc_number] => 12356640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => High-K capacitor dielectric having a metal oxide area comprising boron, electrical device and semiconductor apparatus including the same [patent_app_type] => utility [patent_app_number] => 18/512648 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8172 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512648 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512648
High-K capacitor dielectric having a metal oxide area comprising boron, electrical device and semiconductor apparatus including the same Nov 16, 2023 Issued
Array ( [id] => 19995582 [patent_doc_number] => 20250133804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => LATERAL DIFFUSION METAL OXIDE SEMICONDUCTOR (LDMOS) TRANSISTOR AND METHOD OF MAKING [patent_app_type] => utility [patent_app_number] => 18/505257 [patent_app_country] => US [patent_app_date] => 2023-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11900 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18505257 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/505257
LATERAL DIFFUSION METAL OXIDE SEMICONDUCTOR (LDMOS) TRANSISTOR AND METHOD OF MAKING Nov 8, 2023 Pending
Array ( [id] => 18991213 [patent_doc_number] => 20240063182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SEMICONDUCTOR PACKAGES INCLUDING PASSIVE DEVICES AND METHODS OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 18/501314 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501314 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/501314
Semiconductor packages including passive devices and methods of forming same Nov 2, 2023 Issued
Array ( [id] => 19176158 [patent_doc_number] => 20240162132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => FAN-OUT SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/384152 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9136 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384152 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384152
FAN-OUT SEMICONDUCTOR PACKAGE Oct 25, 2023 Pending
Array ( [id] => 19285991 [patent_doc_number] => 20240222468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/384008 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384008 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384008
Method for fabricating semiconductor device Oct 25, 2023 Issued
Array ( [id] => 19900273 [patent_doc_number] => 12278211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Manufacturing method of semiconductor device [patent_app_type] => utility [patent_app_number] => 18/491813 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 1107 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18491813 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/491813
Manufacturing method of semiconductor device Oct 22, 2023 Issued
Array ( [id] => 19767488 [patent_doc_number] => 12225804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Electroluminescence display device having a through-hole in display area [patent_app_type] => utility [patent_app_number] => 18/382956 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 14032 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382956 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/382956
Electroluminescence display device having a through-hole in display area Oct 22, 2023 Issued
Array ( [id] => 19837753 [patent_doc_number] => 20250089539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 18/564451 [patent_app_country] => US [patent_app_date] => 2023-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18564451 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/564451
DISPLAY PANEL Oct 11, 2023 Pending
Array ( [id] => 20760067 [patent_doc_number] => 12652859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Standard cells with multi-well size placements [patent_app_type] => utility [patent_app_number] => 18/483604 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3468 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483604 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/483604
STANDARD CELLS WITH MULTI-WELL SIZE PLACEMENTS Oct 9, 2023 Issued
Array ( [id] => 19886934 [patent_doc_number] => 12272665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Semiconductor package and method of manufacturing the semiconductor package [patent_app_type] => utility [patent_app_number] => 18/378166 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 37 [patent_no_of_words] => 9264 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18378166 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/378166
Semiconductor package and method of manufacturing the semiconductor package Oct 9, 2023 Issued
Array ( [id] => 19972513 [patent_doc_number] => 12341134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Microelectronic devices, and methods of forming microelectronic devices [patent_app_type] => utility [patent_app_number] => 18/478821 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8383 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478821 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/478821
Microelectronic devices, and methods of forming microelectronic devices Sep 28, 2023 Issued
Array ( [id] => 18898688 [patent_doc_number] => 20240014173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => INTEGRATED CIRCUIT PRODUCT AND CHIP FLOORPLAN ARRANGEMENT THEREOF [patent_app_type] => utility [patent_app_number] => 18/371805 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 377 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18371805 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/371805
Integrated circuit product and chip floorplan arrangement thereof Sep 21, 2023 Issued
Array ( [id] => 19806192 [patent_doc_number] => 20250072117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => ECO BASE CELL STRUCTURE, LAYOUT METHOD, AND SYSTEM [patent_app_type] => utility [patent_app_number] => 18/469349 [patent_app_country] => US [patent_app_date] => 2023-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9153 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/469349
ECO base cell structure, layout method, and system Sep 17, 2023 Issued
Array ( [id] => 19161172 [patent_doc_number] => 20240153879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => SEMICONDUCTOR DEVICE WITH REDISTRIBUTION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/367615 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367615 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/367615
Semiconductor device with redistribution structure Sep 12, 2023 Issued
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