John S. Heyman

Array ( [id] => 2691450 [patent_doc_number] => 05049766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-17 [patent_title] => 'Delay measuring circuit' [patent_app_type] => 1 [patent_app_number] => 7/493593 [patent_app_country] => US [patent_app_date] => 1990-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2943 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/049/05049766.pdf [firstpage_image] =>[orig_patent_app_number] => 493593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2681460 [patent_doc_number] => 05048065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Method and circuit for controlling the frequency of an electronic inverter' [patent_app_type] => 1 [patent_app_number] => 7/491924 [patent_app_country] => US [patent_app_date] => 1990-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1681 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/048/05048065.pdf [firstpage_image] =>[orig_patent_app_number] => 491924 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2769808 [patent_doc_number] => 05063355 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-05 [patent_title] => 'Timer circuit' [patent_app_type] => 1 [patent_app_number] => 7/489948 [patent_app_country] => US [patent_app_date] => 1990-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1871 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/063/05063355.pdf [firstpage_image] =>[orig_patent_app_number] => 489948 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2743303 [patent_doc_number] => 05040197 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-13 [patent_title] => 'Fractional frequency divider for providing a symmetrical output signal' [patent_app_type] => 1 [patent_app_number] => 7/490861 [patent_app_country] => US [patent_app_date] => 1990-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5060 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/040/05040197.pdf [firstpage_image] =>[orig_patent_app_number] => 490861 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2820728 [patent_doc_number] => 05086441 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-04 [patent_title] => 'Frequency divider circuit' [patent_app_type] => 1 [patent_app_number] => 7/484854 [patent_app_country] => US [patent_app_date] => 1990-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 4821 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/086/05086441.pdf [firstpage_image] =>[orig_patent_app_number] => 484854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2704913 [patent_doc_number] => 05065415 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-12 [patent_title] => 'Programmable frequency divider' [patent_app_type] => 1 [patent_app_number] => 7/482990 [patent_app_country] => US [patent_app_date] => 1990-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2167 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/065/05065415.pdf [firstpage_image] =>[orig_patent_app_number] => 482990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2752912 [patent_doc_number] => 05038059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-06 [patent_title] => 'Status register with asynchronous set and reset signals' [patent_app_type] => 1 [patent_app_number] => 7/482103 [patent_app_country] => US [patent_app_date] => 1990-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3056 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/038/05038059.pdf [firstpage_image] =>[orig_patent_app_number] => 482103 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2743201 [patent_doc_number] => 05033066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-16 [patent_title] => 'Event tagging time delay' [patent_app_type] => 1 [patent_app_number] => 7/480999 [patent_app_country] => US [patent_app_date] => 1990-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1938 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/033/05033066.pdf [firstpage_image] =>[orig_patent_app_number] => 480999 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2677545 [patent_doc_number] => 05070518 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-03 [patent_title] => 'Coin counting control apparatus for a vending machine' [patent_app_type] => 1 [patent_app_number] => 7/480692 [patent_app_country] => US [patent_app_date] => 1990-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2342 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/070/05070518.pdf [firstpage_image] =>[orig_patent_app_number] => 480692 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2692690 [patent_doc_number] => 05046076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'Credit card counter with phase error detecting and precount comparing verification system' [patent_app_type] => 1 [patent_app_number] => 7/476565 [patent_app_country] => US [patent_app_date] => 1990-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 9081 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/046/05046076.pdf [firstpage_image] =>[orig_patent_app_number] => 476565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2774211 [patent_doc_number] => 04995060 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'Card counter with card counting preset data entry system method' [patent_app_type] => 1 [patent_app_number] => 7/476556 [patent_app_country] => US [patent_app_date] => 1990-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 7263 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/995/04995060.pdf [firstpage_image] =>[orig_patent_app_number] => 476556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2758729 [patent_doc_number] => 05038368 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-06 [patent_title] => 'Redundancy control circuit employed with various digital logic systems including shift registers' [patent_app_type] => 1 [patent_app_number] => 7/473751 [patent_app_country] => US [patent_app_date] => 1990-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6147 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/038/05038368.pdf [firstpage_image] =>[orig_patent_app_number] => 473751 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2724056 [patent_doc_number] => 05010769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-30 [patent_title] => 'Automatic pseudokeyphasor generator' [patent_app_type] => 1 [patent_app_number] => 7/473004 [patent_app_country] => US [patent_app_date] => 1990-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2550 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010769.pdf [firstpage_image] =>[orig_patent_app_number] => 473004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2754540 [patent_doc_number] => 05029191 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'Binary counter with resolution doubling' [patent_app_type] => 1 [patent_app_number] => 7/471562 [patent_app_country] => US [patent_app_date] => 1990-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1922 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/029/05029191.pdf [firstpage_image] =>[orig_patent_app_number] => 471562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2756528 [patent_doc_number] => 05012497 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-30 [patent_title] => 'High speed frequency divider circuit' [patent_app_type] => 1 [patent_app_number] => 7/470273 [patent_app_country] => US [patent_app_date] => 1990-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6357 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/012/05012497.pdf [firstpage_image] =>[orig_patent_app_number] => 470273 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2715259 [patent_doc_number] => 05017880 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Varying operational frequency control circuit apparatus with noise minimizing feature' [patent_app_type] => 1 [patent_app_number] => 7/469647 [patent_app_country] => US [patent_app_date] => 1990-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3129 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/017/05017880.pdf [firstpage_image] =>[orig_patent_app_number] => 469647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2706861 [patent_doc_number] => 04991185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-05 [patent_title] => 'Method of testing n-bit programmable counters' [patent_app_type] => 1 [patent_app_number] => 7/460500 [patent_app_country] => US [patent_app_date] => 1990-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3238 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/991/04991185.pdf [firstpage_image] =>[orig_patent_app_number] => 460500 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2758710 [patent_doc_number] => 05038367 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-06 [patent_title] => 'Opinion sampling device' [patent_app_type] => 1 [patent_app_number] => 7/459063 [patent_app_country] => US [patent_app_date] => 1989-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4378 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/038/05038367.pdf [firstpage_image] =>[orig_patent_app_number] => 459063 [rel_patent_id] =>[rel_patent_doc_number] =>)