Search

John S Maples

Examiner (ID: 5405)

Most Active Art Unit
1745
Art Unit(s)
1104, 1754, 1795, 2203, 1741, 2201, 1111, 1107, 1723, 1745, 1728, 2202
Total Applications
2365
Issued Applications
1875
Pending Applications
115
Abandoned Applications
375

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16864633 [patent_doc_number] => 11023375 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-01 [patent_title] => Data cache with hybrid writeback and writethrough [patent_app_type] => utility [patent_app_number] => 16/797478 [patent_app_country] => US [patent_app_date] => 2020-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16797478 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/797478
Data cache with hybrid writeback and writethrough Feb 20, 2020 Issued
Array ( [id] => 17039332 [patent_doc_number] => 20210255968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => Device, System, and Method of Determining Memory Requirements and Tracking Memory Usage [patent_app_type] => utility [patent_app_number] => 16/792901 [patent_app_country] => US [patent_app_date] => 2020-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16792901 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/792901
Device, system, and method of determining memory requirements and tracking memory usage Feb 17, 2020 Issued
Array ( [id] => 16758387 [patent_doc_number] => 10976935 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-13 [patent_title] => Method and apparatus for assigning an allocated workload in a data center having multiple storage systems [patent_app_type] => utility [patent_app_number] => 16/787075 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16787075 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/787075
Method and apparatus for assigning an allocated workload in a data center having multiple storage systems Feb 10, 2020 Issued
Array ( [id] => 17861708 [patent_doc_number] => 11442866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Computer memory module processing device with cache storage [patent_app_type] => utility [patent_app_number] => 16/783924 [patent_app_country] => US [patent_app_date] => 2020-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5483 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783924 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/783924
Computer memory module processing device with cache storage Feb 5, 2020 Issued
Array ( [id] => 16000367 [patent_doc_number] => 20200176054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => DETERMINING SOFT DATA FOR FRACTIONAL DIGIT MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/782862 [patent_app_country] => US [patent_app_date] => 2020-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16782862 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/782862
Determining soft data for fractional digit memory cells Feb 4, 2020 Issued
Array ( [id] => 15966659 [patent_doc_number] => 20200167081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => ELECTRONIC DEVICE, COMPUTER SYSTEM, AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/780101 [patent_app_country] => US [patent_app_date] => 2020-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16780101 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/780101
Electronic device, computer system, and control method Feb 2, 2020 Issued
Array ( [id] => 15966661 [patent_doc_number] => 20200167082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => METHODS TO CONFIGURE AND ACCESS SCALABLE OBJECT STORES USING KV-SSDS AND HYBRID BACKEND STORAGE TIERS OF KV-SSDS, NVME-SSDS AND OTHER FLASH DEVICES [patent_app_type] => utility [patent_app_number] => 16/776497 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16776497 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/776497
Methods to configure and access scalable object stores using KV-SSDS and hybrid backend storage tiers of KV-SSDS, NVME-SSDS and other flash devices Jan 28, 2020 Issued
Array ( [id] => 17164959 [patent_doc_number] => 11151058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Adaptive caching in a multi-tier cache [patent_app_type] => utility [patent_app_number] => 16/748656 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 19120 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748656 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748656
Adaptive caching in a multi-tier cache Jan 20, 2020 Issued
Array ( [id] => 16879955 [patent_doc_number] => 11030104 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-08 [patent_title] => Picket fence staging in a multi-tier cache [patent_app_type] => utility [patent_app_number] => 16/748665 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 16851 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748665 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748665
Picket fence staging in a multi-tier cache Jan 20, 2020 Issued
Array ( [id] => 16192960 [patent_doc_number] => 20200233809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => MEASUREMENT SYSTEM AND METHOD FOR OPERATING A MEASUREMENT SYSTEM [patent_app_type] => utility [patent_app_number] => 16/745389 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/745389
Measurement system and method for operating a measurement system Jan 16, 2020 Issued
Array ( [id] => 16818763 [patent_doc_number] => 11003593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Method for managing a cache memory of an electronic processor [patent_app_type] => utility [patent_app_number] => 16/744268 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 14954 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 570 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744268 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744268
Method for managing a cache memory of an electronic processor Jan 15, 2020 Issued
Array ( [id] => 16758393 [patent_doc_number] => 10976941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Validation of storage volumes that are in a peer to peer remote copy relationship [patent_app_type] => utility [patent_app_number] => 16/743846 [patent_app_country] => US [patent_app_date] => 2020-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6903 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16743846 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/743846
Validation of storage volumes that are in a peer to peer remote copy relationship Jan 14, 2020 Issued
Array ( [id] => 17325362 [patent_doc_number] => 11216374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Maintaining a cached version of a file at a router device [patent_app_type] => utility [patent_app_number] => 16/742589 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742589 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/742589
Maintaining a cached version of a file at a router device Jan 13, 2020 Issued
Array ( [id] => 16987013 [patent_doc_number] => 11074186 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-27 [patent_title] => Logical management of a destage process and dynamic cache size of a tiered data storage system cache that is configured to be powered by a temporary power source during a power loss event [patent_app_type] => utility [patent_app_number] => 16/742739 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 14547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742739 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/742739
Logical management of a destage process and dynamic cache size of a tiered data storage system cache that is configured to be powered by a temporary power source during a power loss event Jan 13, 2020 Issued
Array ( [id] => 16844811 [patent_doc_number] => 11016900 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-25 [patent_title] => Limiting table-of-contents prefetching consequent to symbol table requests [patent_app_type] => utility [patent_app_number] => 16/734527 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6472 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734527 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734527
Limiting table-of-contents prefetching consequent to symbol table requests Jan 5, 2020 Issued
Array ( [id] => 16934787 [patent_doc_number] => 20210200676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => Apparatus and Method of Read Leveling for Storage Class Memory [patent_app_type] => utility [patent_app_number] => 16/729306 [patent_app_country] => US [patent_app_date] => 2019-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5945 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729306 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729306
Apparatus and method of read leveling for storage class memory Dec 27, 2019 Issued
Array ( [id] => 17282962 [patent_doc_number] => 11199991 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Method and apparatus for controlling different types of storage units [patent_app_type] => utility [patent_app_number] => 16/712160 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7214 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16712160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/712160
Method and apparatus for controlling different types of storage units Dec 11, 2019 Issued
Array ( [id] => 16872124 [patent_doc_number] => 20210165591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => DATA PRESERVATION IN LINEAR TAPE FILE SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/701250 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701250 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/701250
Data preservation in linear tape file systems Dec 2, 2019 Issued
Array ( [id] => 18734744 [patent_doc_number] => 11803475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Method and apparatus for data caching [patent_app_type] => utility [patent_app_number] => 17/640276 [patent_app_country] => US [patent_app_date] => 2019-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6699 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17640276 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/640276
Method and apparatus for data caching Nov 27, 2019 Issued
Array ( [id] => 15654183 [patent_doc_number] => 20200089622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => PREFETCH KILL AND REVIVAL IN AN INSTRUCTION CACHE [patent_app_type] => utility [patent_app_number] => 16/694751 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694751 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/694751
Prefetch kill and revival in an instruction cache Nov 24, 2019 Issued
Menu