Search

John S. Maples

Examiner (ID: 4144)

Most Active Art Unit
1745
Art Unit(s)
1728, 1795, 1723, 2202, 2201, 2203, 1104, 1111, 1745, 1754, 1107, 1741
Total Applications
2365
Issued Applications
1877
Pending Applications
115
Abandoned Applications
375

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2726547 [patent_doc_number] => 05008856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-16 [patent_title] => 'Electrically programmable nonvolatile semiconductor memory device with NAND cell structure' [patent_app_type] => 1 [patent_app_number] => 7/212649 [patent_app_country] => US [patent_app_date] => 1988-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 47 [patent_no_of_words] => 13550 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/008/05008856.pdf [firstpage_image] =>[orig_patent_app_number] => 212649 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/212649
Electrically programmable nonvolatile semiconductor memory device with NAND cell structure Jun 27, 1988 Issued
Array ( [id] => 2643820 [patent_doc_number] => 04953130 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-28 [patent_title] => 'Memory circuit with extended valid data output time' [patent_app_type] => 1 [patent_app_number] => 7/211619 [patent_app_country] => US [patent_app_date] => 1988-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5139 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/953/04953130.pdf [firstpage_image] =>[orig_patent_app_number] => 211619 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/211619
Memory circuit with extended valid data output time Jun 26, 1988 Issued
Array ( [id] => 2644652 [patent_doc_number] => 04899310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-06 [patent_title] => 'Semiconductor memory device having a register' [patent_app_type] => 1 [patent_app_number] => 7/209819 [patent_app_country] => US [patent_app_date] => 1988-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7698 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/899/04899310.pdf [firstpage_image] =>[orig_patent_app_number] => 209819 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/209819
Semiconductor memory device having a register Jun 21, 1988 Issued
Array ( [id] => 2500389 [patent_doc_number] => 04825322 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-25 [patent_title] => 'Magnetic-tape-cassette apparatus with two-button control of three functions' [patent_app_type] => 1 [patent_app_number] => 7/211069 [patent_app_country] => US [patent_app_date] => 1988-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3779 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/825/04825322.pdf [firstpage_image] =>[orig_patent_app_number] => 211069 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/211069
Magnetic-tape-cassette apparatus with two-button control of three functions Jun 19, 1988 Issued
Array ( [id] => 2578890 [patent_doc_number] => 04901279 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-13 [patent_title] => 'MESFET sram with power saving current-limiting transistors' [patent_app_type] => 1 [patent_app_number] => 7/208719 [patent_app_country] => US [patent_app_date] => 1988-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2201 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/901/04901279.pdf [firstpage_image] =>[orig_patent_app_number] => 208719 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/208719
MESFET sram with power saving current-limiting transistors Jun 19, 1988 Issued
Array ( [id] => 2494994 [patent_doc_number] => 04866677 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-12 [patent_title] => 'Semiconductor memory device with multiple alternating decoders coupled to each word line' [patent_app_type] => 1 [patent_app_number] => 7/208786 [patent_app_country] => US [patent_app_date] => 1988-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 20 [patent_no_of_words] => 6028 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/866/04866677.pdf [firstpage_image] =>[orig_patent_app_number] => 208786 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/208786
Semiconductor memory device with multiple alternating decoders coupled to each word line Jun 16, 1988 Issued
Array ( [id] => 2535010 [patent_doc_number] => 04888739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-19 [patent_title] => 'First-in first-out buffer memory with improved status flags' [patent_app_type] => 1 [patent_app_number] => 7/207249 [patent_app_country] => US [patent_app_date] => 1988-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3559 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 435 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/888/04888739.pdf [firstpage_image] =>[orig_patent_app_number] => 207249 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/207249
First-in first-out buffer memory with improved status flags Jun 14, 1988 Issued
07/207011 DISC RECORDING AND/OR REPRODUCING APPARATUS INCLUDING MEANS FOR MINIMIZING THE EFFECTS OF TEMPERATURE CHANGES Jun 14, 1988 Abandoned
07/203909 OPTICAL ASSOCIATIVE MEMORY EMPLOYING AN AUTOCORRELATION MATRIX Jun 7, 1988 Abandoned
Array ( [id] => 2484068 [patent_doc_number] => 04890263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-26 [patent_title] => 'RAM with capability for rapid clearing of data from memory by simultaneously selecting all row lines' [patent_app_type] => 1 [patent_app_number] => 7/200649 [patent_app_country] => US [patent_app_date] => 1988-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3119 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/890/04890263.pdf [firstpage_image] =>[orig_patent_app_number] => 200649 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/200649
RAM with capability for rapid clearing of data from memory by simultaneously selecting all row lines May 30, 1988 Issued
Array ( [id] => 2555211 [patent_doc_number] => 04811134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-07 [patent_title] => 'Unitary die cast head drum base for a magnetic recording and/or reproducing apparatus' [patent_app_type] => 1 [patent_app_number] => 7/204955 [patent_app_country] => US [patent_app_date] => 1988-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1723 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/811/04811134.pdf [firstpage_image] =>[orig_patent_app_number] => 204955 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/204955
Unitary die cast head drum base for a magnetic recording and/or reproducing apparatus May 30, 1988 Issued
Array ( [id] => 2613121 [patent_doc_number] => 04949309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-14 [patent_title] => 'EEPROM utilizing single transistor per cell capable of both byte erase and flash erase' [patent_app_type] => 1 [patent_app_number] => 7/192580 [patent_app_country] => US [patent_app_date] => 1988-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3579 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/949/04949309.pdf [firstpage_image] =>[orig_patent_app_number] => 192580 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/192580
EEPROM utilizing single transistor per cell capable of both byte erase and flash erase May 10, 1988 Issued
Array ( [id] => 2618765 [patent_doc_number] => 04903242 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-20 [patent_title] => 'Serial access memory circuit with improved serial addressing circuit composed of a shift register' [patent_app_type] => 1 [patent_app_number] => 7/190969 [patent_app_country] => US [patent_app_date] => 1988-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3552 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/903/04903242.pdf [firstpage_image] =>[orig_patent_app_number] => 190969 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/190969
Serial access memory circuit with improved serial addressing circuit composed of a shift register May 5, 1988 Issued
Array ( [id] => 2498244 [patent_doc_number] => 04802136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-31 [patent_title] => 'Data delay/memory circuit' [patent_app_type] => 1 [patent_app_number] => 7/188672 [patent_app_country] => US [patent_app_date] => 1988-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 49 [patent_no_of_words] => 2707 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/802/04802136.pdf [firstpage_image] =>[orig_patent_app_number] => 188672 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/188672
Data delay/memory circuit Apr 28, 1988 Issued
Array ( [id] => 2608246 [patent_doc_number] => 04922456 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-01 [patent_title] => 'Method of reducing wearout in a non-volatile memory with double buffer' [patent_app_type] => 1 [patent_app_number] => 7/187979 [patent_app_country] => US [patent_app_date] => 1988-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 4842 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/922/04922456.pdf [firstpage_image] =>[orig_patent_app_number] => 187979 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/187979
Method of reducing wearout in a non-volatile memory with double buffer Apr 28, 1988 Issued
07/185454 LARGE SCALE INTEGRABLE MEMORY CELL INCLUDING A TRENCH CAPACITOR Apr 24, 1988 Abandoned
07/184028 SENSITIVE MAGNETIC HEAD AND MAGNETIC RECORDING AND REPRODUCING APPARATUS Apr 19, 1988 Abandoned
Array ( [id] => 2665469 [patent_doc_number] => 04930105 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-29 [patent_title] => 'Nonvolatile semiconductor memory device with a double gate structure' [patent_app_type] => 1 [patent_app_number] => 7/178609 [patent_app_country] => US [patent_app_date] => 1988-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 5008 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/930/04930105.pdf [firstpage_image] =>[orig_patent_app_number] => 178609 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/178609
Nonvolatile semiconductor memory device with a double gate structure Apr 6, 1988 Issued
Array ( [id] => 2602698 [patent_doc_number] => 04918662 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-17 [patent_title] => 'Semiconductor memory device having redundant structure for segmented word line arrangement' [patent_app_type] => 1 [patent_app_number] => 7/174469 [patent_app_country] => US [patent_app_date] => 1988-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3417 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 404 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/918/04918662.pdf [firstpage_image] =>[orig_patent_app_number] => 174469 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/174469
Semiconductor memory device having redundant structure for segmented word line arrangement Mar 27, 1988 Issued
Array ( [id] => 2594907 [patent_doc_number] => 04891790 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-02 [patent_title] => 'Optical system with an optically addressable plane of optically bistable material elements' [patent_app_type] => 1 [patent_app_number] => 7/173915 [patent_app_country] => US [patent_app_date] => 1988-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1087 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/891/04891790.pdf [firstpage_image] =>[orig_patent_app_number] => 173915 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/173915
Optical system with an optically addressable plane of optically bistable material elements Mar 27, 1988 Issued
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