| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2568102
[patent_doc_number] => 04853894
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-01
[patent_title] => 'Static random-access memory having multilevel conductive layer'
[patent_app_type] => 1
[patent_app_number] => 7/071749
[patent_app_country] => US
[patent_app_date] => 1987-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 23
[patent_no_of_words] => 5178
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/853/04853894.pdf
[firstpage_image] =>[orig_patent_app_number] => 071749
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/071749 | Static random-access memory having multilevel conductive layer | Jul 8, 1987 | Issued |
Array
(
[id] => 2574290
[patent_doc_number] => 04858181
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-15
[patent_title] => 'Fast recovery PNP loaded bipolar static RAM memory cell with an independent current path'
[patent_app_type] => 1
[patent_app_number] => 7/070769
[patent_app_country] => US
[patent_app_date] => 1987-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 10
[patent_no_of_words] => 6642
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/858/04858181.pdf
[firstpage_image] =>[orig_patent_app_number] => 070769
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/070769 | Fast recovery PNP loaded bipolar static RAM memory cell with an independent current path | Jul 6, 1987 | Issued |
Array
(
[id] => 2568081
[patent_doc_number] => 04853893
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-01
[patent_title] => 'Data storage device and method of using a ferroelectric capacitance divider'
[patent_app_type] => 1
[patent_app_number] => 7/069389
[patent_app_country] => US
[patent_app_date] => 1987-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 13
[patent_no_of_words] => 6340
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/853/04853893.pdf
[firstpage_image] =>[orig_patent_app_number] => 069389
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/069389 | Data storage device and method of using a ferroelectric capacitance divider | Jul 1, 1987 | Issued |
Array
(
[id] => 2499237
[patent_doc_number] => 04829485
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-05-09
[patent_title] => 'Method of reading signals in a charge-storage line sensor in which each storage device is sequentially read and then reset during a subsequent dead time interval'
[patent_app_type] => 1
[patent_app_number] => 7/068929
[patent_app_country] => US
[patent_app_date] => 1987-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3508
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/829/04829485.pdf
[firstpage_image] =>[orig_patent_app_number] => 068929
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/068929 | Method of reading signals in a charge-storage line sensor in which each storage device is sequentially read and then reset during a subsequent dead time interval | Jun 30, 1987 | Issued |
Array
(
[id] => 2562717
[patent_doc_number] => 04809103
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-02-28
[patent_title] => 'Head slider with an integrated flat magnetic head'
[patent_app_type] => 1
[patent_app_number] => 7/063793
[patent_app_country] => US
[patent_app_date] => 1987-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 1405
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/809/04809103.pdf
[firstpage_image] =>[orig_patent_app_number] => 063793
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/063793 | Head slider with an integrated flat magnetic head | Jun 21, 1987 | Issued |
Array
(
[id] => 2500835
[patent_doc_number] => 04860253
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-22
[patent_title] => 'Associative memory system with spatial light modulator and feedback for adjustable thresholding and enhancement'
[patent_app_type] => 1
[patent_app_number] => 7/064979
[patent_app_country] => US
[patent_app_date] => 1987-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 6828
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/860/04860253.pdf
[firstpage_image] =>[orig_patent_app_number] => 064979
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/064979 | Associative memory system with spatial light modulator and feedback for adjustable thresholding and enhancement | Jun 18, 1987 | Issued |
Array
(
[id] => 2524856
[patent_doc_number] => 04819209
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-04-04
[patent_title] => 'Simultaneous dual access semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/063989
[patent_app_country] => US
[patent_app_date] => 1987-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4889
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/819/04819209.pdf
[firstpage_image] =>[orig_patent_app_number] => 063989
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/063989 | Simultaneous dual access semiconductor memory device | Jun 18, 1987 | Issued |
| 07/064019 | DEVICE TO DETECT THE FUNCTIONING OF THE READ SYSTEM OF AN EPROM OR EEPROM MEMORY CELL | Jun 18, 1987 | Abandoned |
| 07/058459 | A DOUBLE-ENDED MEMORY CELL ARRARY USING INTERLEAVED BIT LINES AND METHOD OF FABRICATION THEREFORE | Jun 4, 1987 | Abandoned |
Array
(
[id] => 2574327
[patent_doc_number] => 04858183
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-15
[patent_title] => 'ECL high speed semiconductor memory and method of accessing stored information therein'
[patent_app_type] => 1
[patent_app_number] => 7/057399
[patent_app_country] => US
[patent_app_date] => 1987-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 7731
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 290
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/858/04858183.pdf
[firstpage_image] =>[orig_patent_app_number] => 057399
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/057399 | ECL high speed semiconductor memory and method of accessing stored information therein | Jun 1, 1987 | Issued |
Array
(
[id] => 2539603
[patent_doc_number] => 04839866
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-06-13
[patent_title] => 'Cascadable first-in, first-out memory'
[patent_app_type] => 1
[patent_app_number] => 7/055669
[patent_app_country] => US
[patent_app_date] => 1987-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 11433
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/839/04839866.pdf
[firstpage_image] =>[orig_patent_app_number] => 055669
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/055669 | Cascadable first-in, first-out memory | May 28, 1987 | Issued |
Array
(
[id] => 2420926
[patent_doc_number] => 04725983
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-02-16
[patent_title] => 'Nonvolatile semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/046789
[patent_app_country] => US
[patent_app_date] => 1987-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3622
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 295
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/725/04725983.pdf
[firstpage_image] =>[orig_patent_app_number] => 046789
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/046789 | Nonvolatile semiconductor memory device | May 6, 1987 | Issued |
Array
(
[id] => 2450308
[patent_doc_number] => 04722012
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-01-26
[patent_title] => 'Disc drive arrangement for a hard disc cartridge having a carriage for accurately positioning a head relative to the cartridge'
[patent_app_type] => 1
[patent_app_number] => 7/047038
[patent_app_country] => US
[patent_app_date] => 1987-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 5153
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 312
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/722/04722012.pdf
[firstpage_image] =>[orig_patent_app_number] => 047038
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/047038 | Disc drive arrangement for a hard disc cartridge having a carriage for accurately positioning a head relative to the cartridge | May 4, 1987 | Issued |
Array
(
[id] => 2528286
[patent_doc_number] => 04864543
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-05
[patent_title] => 'First-in, first-out memory with counter address pointers for generating multiple memory status flags'
[patent_app_type] => 1
[patent_app_number] => 7/045010
[patent_app_country] => US
[patent_app_date] => 1987-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 19
[patent_no_of_words] => 14578
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/864/04864543.pdf
[firstpage_image] =>[orig_patent_app_number] => 045010
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/045010 | First-in, first-out memory with counter address pointers for generating multiple memory status flags | Apr 29, 1987 | Issued |
Array
(
[id] => 2493137
[patent_doc_number] => 04800535
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-01-24
[patent_title] => 'Interleaved memory addressing system and method using a parity signal'
[patent_app_type] => 1
[patent_app_number] => 7/043840
[patent_app_country] => US
[patent_app_date] => 1987-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1262
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/800/04800535.pdf
[firstpage_image] =>[orig_patent_app_number] => 043840
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/043840 | Interleaved memory addressing system and method using a parity signal | Apr 27, 1987 | Issued |
Array
(
[id] => 2558345
[patent_doc_number] => 04811299
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-03-07
[patent_title] => 'Dynamic RAM device having a separate test mode capability'
[patent_app_type] => 1
[patent_app_number] => 7/041070
[patent_app_country] => US
[patent_app_date] => 1987-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 5439
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/811/04811299.pdf
[firstpage_image] =>[orig_patent_app_number] => 041070
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/041070 | Dynamic RAM device having a separate test mode capability | Apr 21, 1987 | Issued |
Array
(
[id] => 2528353
[patent_doc_number] => 04855950
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-08
[patent_title] => 'Optical storage apparatus including a reversible, doping modulated, multilayer, amorphous element'
[patent_app_type] => 1
[patent_app_number] => 7/040190
[patent_app_country] => US
[patent_app_date] => 1987-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3943
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/855/04855950.pdf
[firstpage_image] =>[orig_patent_app_number] => 040190
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/040190 | Optical storage apparatus including a reversible, doping modulated, multilayer, amorphous element | Apr 16, 1987 | Issued |
Array
(
[id] => 2491356
[patent_doc_number] => 04823319
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-04-18
[patent_title] => 'Integrated memory circuit having complementary bit line charging'
[patent_app_type] => 1
[patent_app_number] => 7/039400
[patent_app_country] => US
[patent_app_date] => 1987-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2552
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/823/04823319.pdf
[firstpage_image] =>[orig_patent_app_number] => 039400
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/039400 | Integrated memory circuit having complementary bit line charging | Apr 16, 1987 | Issued |
Array
(
[id] => 2494922
[patent_doc_number] => 04866673
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-12
[patent_title] => 'BI-MOS semiconductor memory having high soft error immunity'
[patent_app_type] => 1
[patent_app_number] => 7/038940
[patent_app_country] => US
[patent_app_date] => 1987-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 21
[patent_no_of_words] => 10969
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/866/04866673.pdf
[firstpage_image] =>[orig_patent_app_number] => 038940
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/038940 | BI-MOS semiconductor memory having high soft error immunity | Apr 15, 1987 | Issued |
Array
(
[id] => 2463360
[patent_doc_number] => 04717981
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-01-05
[patent_title] => 'Hard disc cartridge arrangement with an automatically activated door'
[patent_app_type] => 1
[patent_app_number] => 7/040741
[patent_app_country] => US
[patent_app_date] => 1987-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2656
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/717/04717981.pdf
[firstpage_image] =>[orig_patent_app_number] => 040741
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/040741 | Hard disc cartridge arrangement with an automatically activated door | Apr 8, 1987 | Issued |