Search

John S. Ruggles

Examiner (ID: 14128)

Most Active Art Unit
1721
Art Unit(s)
1721, 1795, OPC, 1756
Total Applications
315
Issued Applications
206
Pending Applications
0
Abandoned Applications
109

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7636026 [patent_doc_number] => 06380634 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Conductor wires and semiconductor device using them' [patent_app_type] => B1 [patent_app_number] => 09/361502 [patent_app_country] => US [patent_app_date] => 1999-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 2845 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/380/06380634.pdf [firstpage_image] =>[orig_patent_app_number] => 09361502 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/361502
Conductor wires and semiconductor device using them Jul 22, 1999 Issued
Array ( [id] => 1505275 [patent_doc_number] => 06465811 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Low-capacitance bond pads for high speed devices' [patent_app_type] => B1 [patent_app_number] => 09/351702 [patent_app_country] => US [patent_app_date] => 1999-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3271 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465811.pdf [firstpage_image] =>[orig_patent_app_number] => 09351702 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/351702
Low-capacitance bond pads for high speed devices Jul 11, 1999 Issued
Array ( [id] => 1442003 [patent_doc_number] => 06335559 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Semiconductor device cleave initiation' [patent_app_type] => B1 [patent_app_number] => 09/349253 [patent_app_country] => US [patent_app_date] => 1999-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4684 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335559.pdf [firstpage_image] =>[orig_patent_app_number] => 09349253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/349253
Semiconductor device cleave initiation Jul 7, 1999 Issued
Array ( [id] => 4411142 [patent_doc_number] => 06232667 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Technique for underfilling stacked chips on a cavity MLC module' [patent_app_type] => 1 [patent_app_number] => 9/343651 [patent_app_country] => US [patent_app_date] => 1999-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4190 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232667.pdf [firstpage_image] =>[orig_patent_app_number] => 343651 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/343651
Technique for underfilling stacked chips on a cavity MLC module Jun 28, 1999 Issued
Array ( [id] => 1422623 [patent_doc_number] => 06518653 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-11 [patent_title] => 'Lead frame and semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/328260 [patent_app_country] => US [patent_app_date] => 1999-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2332 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/518/06518653.pdf [firstpage_image] =>[orig_patent_app_number] => 09328260 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/328260
Lead frame and semiconductor device Jun 9, 1999 Issued
Array ( [id] => 4373503 [patent_doc_number] => 06274927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Plastic package for an optical integrated circuit device and method of making' [patent_app_type] => 1 [patent_app_number] => 9/324710 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 7786 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274927.pdf [firstpage_image] =>[orig_patent_app_number] => 324710 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/324710
Plastic package for an optical integrated circuit device and method of making Jun 2, 1999 Issued
Array ( [id] => 1360414 [patent_doc_number] => 06576971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-10 [patent_title] => 'Chip type electronic part' [patent_app_type] => B2 [patent_app_number] => 09/320661 [patent_app_country] => US [patent_app_date] => 1999-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2295 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/576/06576971.pdf [firstpage_image] =>[orig_patent_app_number] => 09320661 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/320661
Chip type electronic part May 26, 1999 Issued
09/320431 METHOD OF USING HYDROGEN GAS IN SPUTTER DEPOSITION OF ALUMINUM-CONTAINING FILMS AND ALUMINUM-CONTAINING FILMS DERIVED THEREFROM May 25, 1999 Abandoned
Array ( [id] => 4318260 [patent_doc_number] => 06316836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Semiconductor device interconnection structure' [patent_app_type] => 1 [patent_app_number] => 9/320493 [patent_app_country] => US [patent_app_date] => 1999-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 3493 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316836.pdf [firstpage_image] =>[orig_patent_app_number] => 320493 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/320493
Semiconductor device interconnection structure May 25, 1999 Issued
Array ( [id] => 1587913 [patent_doc_number] => 06359330 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Optoelectronic module and method for stabilizing its temperature' [patent_app_type] => B1 [patent_app_number] => 09/317222 [patent_app_country] => US [patent_app_date] => 1999-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 731 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359330.pdf [firstpage_image] =>[orig_patent_app_number] => 09317222 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/317222
Optoelectronic module and method for stabilizing its temperature May 23, 1999 Issued
Array ( [id] => 4137861 [patent_doc_number] => 06147404 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Dual barrier and conductor deposition in a dual damascene process for semiconductors' [patent_app_type] => 1 [patent_app_number] => 9/317813 [patent_app_country] => US [patent_app_date] => 1999-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2743 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/147/06147404.pdf [firstpage_image] =>[orig_patent_app_number] => 317813 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/317813
Dual barrier and conductor deposition in a dual damascene process for semiconductors May 23, 1999 Issued
Array ( [id] => 1400254 [patent_doc_number] => 06545355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-08 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => B2 [patent_app_number] => 09/313172 [patent_app_country] => US [patent_app_date] => 1999-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5551 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/545/06545355.pdf [firstpage_image] =>[orig_patent_app_number] => 09313172 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313172
Semiconductor device and method of fabricating the same May 17, 1999 Issued
Array ( [id] => 4191113 [patent_doc_number] => 06093969 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Face-to-face (FTF) stacked assembly of substrate-on-bare-chip (SOBC) modules' [patent_app_type] => 1 [patent_app_number] => 9/313562 [patent_app_country] => US [patent_app_date] => 1999-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3133 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/093/06093969.pdf [firstpage_image] =>[orig_patent_app_number] => 313562 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313562
Face-to-face (FTF) stacked assembly of substrate-on-bare-chip (SOBC) modules May 14, 1999 Issued
Array ( [id] => 4376621 [patent_doc_number] => 06288434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Photodetecting integrated circuits with low cross talk' [patent_app_type] => 1 [patent_app_number] => 9/312030 [patent_app_country] => US [patent_app_date] => 1999-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2672 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288434.pdf [firstpage_image] =>[orig_patent_app_number] => 312030 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/312030
Photodetecting integrated circuits with low cross talk May 13, 1999 Issued
Array ( [id] => 6897488 [patent_doc_number] => 20010045653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'APPARATUS AND METHOD FOR METAL LAYER STRECHED CONDUCTING PLUGS' [patent_app_type] => new [patent_app_number] => 09/311502 [patent_app_country] => US [patent_app_date] => 1999-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1208 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20010045653.pdf [firstpage_image] =>[orig_patent_app_number] => 09311502 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/311502
APPARATUS AND METHOD FOR METAL LAYER STRECHED CONDUCTING PLUGS May 12, 1999 Abandoned
Array ( [id] => 4364657 [patent_doc_number] => 06191467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/307033 [patent_app_country] => US [patent_app_date] => 1999-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 3191 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191467.pdf [firstpage_image] =>[orig_patent_app_number] => 307033 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/307033
Semiconductor device and method for fabricating the same May 6, 1999 Issued
Array ( [id] => 4190708 [patent_doc_number] => 06093942 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Semiconductor device with improved pad layout' [patent_app_type] => 1 [patent_app_number] => 9/305472 [patent_app_country] => US [patent_app_date] => 1999-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4612 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/093/06093942.pdf [firstpage_image] =>[orig_patent_app_number] => 305472 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/305472
Semiconductor device with improved pad layout May 5, 1999 Issued
Array ( [id] => 4410962 [patent_doc_number] => 06271586 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Integrated circuit chip and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/303142 [patent_app_country] => US [patent_app_date] => 1999-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 33 [patent_no_of_words] => 4534 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271586.pdf [firstpage_image] =>[orig_patent_app_number] => 303142 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/303142
Integrated circuit chip and method for fabricating the same Apr 29, 1999 Issued
Array ( [id] => 4385982 [patent_doc_number] => 06303997 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Thin, stackable semiconductor packages' [patent_app_type] => 1 [patent_app_number] => 9/287711 [patent_app_country] => US [patent_app_date] => 1999-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4491 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303997.pdf [firstpage_image] =>[orig_patent_app_number] => 287711 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/287711
Thin, stackable semiconductor packages Apr 6, 1999 Issued
Array ( [id] => 1404570 [patent_doc_number] => 06531769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-11 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE, SEMICONDUCTOR APPARATUS PROVIDED WITH A PLURALITY OF SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGES, METHOD OF INSPECTING SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE AND METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => B2 [patent_app_number] => 09/283181 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 36 [patent_no_of_words] => 7398 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/531/06531769.pdf [firstpage_image] =>[orig_patent_app_number] => 09283181 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/283181
SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE, SEMICONDUCTOR APPARATUS PROVIDED WITH A PLURALITY OF SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGES, METHOD OF INSPECTING SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE AND METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT Mar 31, 1999 Issued
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