Search

John W. Poos

Examiner (ID: 7981, Phone: (571)270-5077 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2896, 2842, 4125
Total Applications
1592
Issued Applications
1425
Pending Applications
126
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16273052 [patent_doc_number] => 20200274540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => PHASE-FREQUENCY DETECTOR WITH FREQUENCY DOUBLING LOGIC [patent_app_type] => utility [patent_app_number] => 16/282616 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16282616 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/282616
Phase-frequency detector with frequency doubling logic Feb 21, 2019 Issued
Array ( [id] => 14754405 [patent_doc_number] => 20190260376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => CURRENT SENSE DEVICES AND ASSOCIATED METHODS [patent_app_type] => utility [patent_app_number] => 16/280161 [patent_app_country] => US [patent_app_date] => 2019-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16280161 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/280161
Current sense devices and associated methods Feb 19, 2019 Issued
Array ( [id] => 17078611 [patent_doc_number] => 11115031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Phase-locked loop [patent_app_type] => utility [patent_app_number] => 16/976670 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6214 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16976670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/976670
Phase-locked loop Feb 14, 2019 Issued
Array ( [id] => 16464788 [patent_doc_number] => 10848155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Flexible transmitter circuitry for integrated circuits [patent_app_type] => utility [patent_app_number] => 16/277674 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277674 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/277674
Flexible transmitter circuitry for integrated circuits Feb 14, 2019 Issued
Array ( [id] => 14754375 [patent_doc_number] => 20190260361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => INPUT BUFFER WITH LOW STATIC CURRENT CONSUMPTION [patent_app_type] => utility [patent_app_number] => 16/275933 [patent_app_country] => US [patent_app_date] => 2019-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16275933 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/275933
INPUT BUFFER WITH LOW STATIC CURRENT CONSUMPTION Feb 13, 2019 Abandoned
Array ( [id] => 14786187 [patent_doc_number] => 20190267991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => CONTROL CIRCUIT FOR POWER SWITCH [patent_app_type] => utility [patent_app_number] => 16/274844 [patent_app_country] => US [patent_app_date] => 2019-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16274844 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/274844
Control circuit for power switch Feb 12, 2019 Issued
Array ( [id] => 17107952 [patent_doc_number] => 11128183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Electric power transmission device [patent_app_type] => utility [patent_app_number] => 16/754640 [patent_app_country] => US [patent_app_date] => 2019-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 19099 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16754640 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/754640
Electric power transmission device Feb 7, 2019 Issued
Array ( [id] => 15940899 [patent_doc_number] => 20200162083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => DITHERED M BY N CLOCK DIVIDERS [patent_app_type] => utility [patent_app_number] => 16/269473 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16269473 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/269473
Dithered M by N clock dividers Feb 5, 2019 Issued
Array ( [id] => 15858781 [patent_doc_number] => 10644694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Power-on reset circuit with hysteresis [patent_app_type] => utility [patent_app_number] => 16/267774 [patent_app_country] => US [patent_app_date] => 2019-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4369 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267774 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267774
Power-on reset circuit with hysteresis Feb 4, 2019 Issued
Array ( [id] => 15858781 [patent_doc_number] => 10644694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Power-on reset circuit with hysteresis [patent_app_type] => utility [patent_app_number] => 16/267774 [patent_app_country] => US [patent_app_date] => 2019-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4369 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267774 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267774
Power-on reset circuit with hysteresis Feb 4, 2019 Issued
Array ( [id] => 14415063 [patent_doc_number] => 20190173375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => ELECTRONIC AMPLIFIER FOR AMPLIFYING AN INPUT SIGNAL [patent_app_type] => utility [patent_app_number] => 16/266723 [patent_app_country] => US [patent_app_date] => 2019-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8062 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16266723 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/266723
Electronic amplifier for amplifying an input signal Feb 3, 2019 Issued
Array ( [id] => 19370730 [patent_doc_number] => 12062827 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Attenuator for qubit drive signals [patent_app_type] => utility [patent_app_number] => 17/297178 [patent_app_country] => US [patent_app_date] => 2019-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11166 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17297178 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/297178
Attenuator for qubit drive signals Jan 31, 2019 Issued
Array ( [id] => 14678031 [patent_doc_number] => 20190238130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => Switch Circuit, Corresponding Device and Method [patent_app_type] => utility [patent_app_number] => 16/261267 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16261267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/261267
Switch circuit, corresponding device and method Jan 28, 2019 Issued
Array ( [id] => 15986137 [patent_doc_number] => 10673411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Large-signal GM3 cancellation technique for highly-linear active mixers [patent_app_type] => utility [patent_app_number] => 16/256733 [patent_app_country] => US [patent_app_date] => 2019-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 11796 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16256733 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/256733
Large-signal GM3 cancellation technique for highly-linear active mixers Jan 23, 2019 Issued
Array ( [id] => 14589217 [patent_doc_number] => 20190222217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => Frequency-agile clock multiplier [patent_app_type] => utility [patent_app_number] => 16/247894 [patent_app_country] => US [patent_app_date] => 2019-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16275 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16247894 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/247894
Frequency-agile clock multiplier Jan 14, 2019 Issued
Array ( [id] => 15261269 [patent_doc_number] => 20190379368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => DIGITAL GLITCH FILTER [patent_app_type] => utility [patent_app_number] => 16/237712 [patent_app_country] => US [patent_app_date] => 2019-01-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16237712 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/237712
Digital glitch filter Dec 31, 2018 Issued
Array ( [id] => 15489461 [patent_doc_number] => 10560099 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-11 [patent_title] => Semiconductor apparatus using swing level conversion circuit [patent_app_type] => utility [patent_app_number] => 16/237441 [patent_app_country] => US [patent_app_date] => 2018-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5551 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16237441 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/237441
Semiconductor apparatus using swing level conversion circuit Dec 30, 2018 Issued
Array ( [id] => 14574753 [patent_doc_number] => 20190214984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => BIASING ARCHITECTURES AND METHODS FOR LOWER LOSS SWITCHES [patent_app_type] => utility [patent_app_number] => 16/236431 [patent_app_country] => US [patent_app_date] => 2018-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16236431 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/236431
Biasing architectures and methods for lower loss switches Dec 28, 2018 Issued
Array ( [id] => 15171421 [patent_doc_number] => 10491226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-26 [patent_title] => Method, processing circuit, and wireless communication device capable of tuning current provided for DCO to lower current level as far as possible [patent_app_type] => utility [patent_app_number] => 16/234480 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4296 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234480 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234480
Method, processing circuit, and wireless communication device capable of tuning current provided for DCO to lower current level as far as possible Dec 26, 2018 Issued
Array ( [id] => 15201663 [patent_doc_number] => 10498344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-03 [patent_title] => Phase cancellation in a phase-locked loop [patent_app_type] => utility [patent_app_number] => 16/233283 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4720 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16233283 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/233283
Phase cancellation in a phase-locked loop Dec 26, 2018 Issued
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