Search

John W. Poos

Examiner (ID: 7981, Phone: (571)270-5077 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2896, 2842, 4125
Total Applications
1592
Issued Applications
1425
Pending Applications
126
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10909926 [patent_doc_number] => 20140312942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-23 [patent_title] => 'PHASE-LOCKED LOOP OUTPUTS WITH REDUCED REFERENCE SPURS AND NOISE' [patent_app_type] => utility [patent_app_number] => 14/002055 [patent_app_country] => US [patent_app_date] => 2013-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8623 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14002055 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/002055
Phase-locked loop outputs with reduced reference spurs and noise Apr 21, 2013 Issued
Array ( [id] => 9105187 [patent_doc_number] => 20130278318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'SIGNAL PROCESSING APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/864807 [patent_app_country] => US [patent_app_date] => 2013-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10643 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13864807 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/864807
Signal processing apparatus and method Apr 16, 2013 Issued
Array ( [id] => 10909927 [patent_doc_number] => 20140312944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-23 [patent_title] => 'CHARGE PUMP PHASE-LOCKED LOOP CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/864868 [patent_app_country] => US [patent_app_date] => 2013-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13864868 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/864868
Charge pump phase-locked loop circuits Apr 16, 2013 Issued
Array ( [id] => 9483980 [patent_doc_number] => 08729933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Frequency multiplier circuit with function of automatically adjusting duty cycle of output signal and system thereof' [patent_app_type] => utility [patent_app_number] => 13/857972 [patent_app_country] => US [patent_app_date] => 2013-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3045 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13857972 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/857972
Frequency multiplier circuit with function of automatically adjusting duty cycle of output signal and system thereof Apr 4, 2013 Issued
Array ( [id] => 9754593 [patent_doc_number] => 20140285293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-25 [patent_title] => 'Dielectric Waveguide with RJ45 Connector' [patent_app_type] => utility [patent_app_number] => 13/854954 [patent_app_country] => US [patent_app_date] => 2013-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 14049 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13854954 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/854954
Dielectric waveguide with RJ45 connector Mar 31, 2013 Issued
Array ( [id] => 10631905 [patent_doc_number] => 09350063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Dielectric waveguide with non-planar interface surface and mating deformable material' [patent_app_type] => utility [patent_app_number] => 13/854943 [patent_app_country] => US [patent_app_date] => 2013-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 50 [patent_no_of_words] => 14067 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13854943 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/854943
Dielectric waveguide with non-planar interface surface and mating deformable material Mar 31, 2013 Issued
Array ( [id] => 12037207 [patent_doc_number] => 09815423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Motor vehicle state control system and method' [patent_app_type] => utility [patent_app_number] => 14/777574 [patent_app_country] => US [patent_app_date] => 2013-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4128 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14777574 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/777574
Motor vehicle state control system and method Mar 21, 2013 Issued
Array ( [id] => 9778884 [patent_doc_number] => 08854093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Multi-phase clock generation circuit' [patent_app_type] => utility [patent_app_number] => 13/845181 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3691 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845181 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845181
Multi-phase clock generation circuit Mar 17, 2013 Issued
Array ( [id] => 9558502 [patent_doc_number] => 20140176214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'PHASE SPLITTER' [patent_app_type] => utility [patent_app_number] => 13/846005 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2615 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846005 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/846005
Phase splitter Mar 17, 2013 Issued
Array ( [id] => 9663308 [patent_doc_number] => 08810297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Circuit device, frequency changing circuit, method of testing circuit device, and method of controlling frequency changing circuit' [patent_app_type] => utility [patent_app_number] => 13/834433 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19207 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834433 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/834433
Circuit device, frequency changing circuit, method of testing circuit device, and method of controlling frequency changing circuit Mar 14, 2013 Issued
Array ( [id] => 9649536 [patent_doc_number] => 08803558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Integrated circuit' [patent_app_type] => utility [patent_app_number] => 13/842723 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4705 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842723 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842723
Integrated circuit Mar 14, 2013 Issued
Array ( [id] => 9889671 [patent_doc_number] => 08975932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Pulse signal generation circuit and operating method thereof' [patent_app_type] => utility [patent_app_number] => 13/842043 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3299 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842043 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842043
Pulse signal generation circuit and operating method thereof Mar 14, 2013 Issued
Array ( [id] => 9824241 [patent_doc_number] => 08933729 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-13 [patent_title] => 'Stacked receivers' [patent_app_type] => utility [patent_app_number] => 13/834970 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13310 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834970 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/834970
Stacked receivers Mar 14, 2013 Issued
Array ( [id] => 9065735 [patent_doc_number] => 20130257491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'DRIVER WITH RESISTANCE CALIBRATION CAPABILITY' [patent_app_type] => utility [patent_app_number] => 13/835495 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7538 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/835495
Driver with resistance calibration capability Mar 14, 2013 Issued
Array ( [id] => 10858454 [patent_doc_number] => 08884658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Inverter with parallel power devices' [patent_app_type] => utility [patent_app_number] => 13/842458 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6142 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842458 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842458
Inverter with parallel power devices Mar 14, 2013 Issued
Array ( [id] => 10337256 [patent_doc_number] => 20150222261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'LINE DRIVER WITH SEPARATE PRE-DRIVER FOR FEED-THROUGH CAPACITANCE' [patent_app_type] => utility [patent_app_number] => 14/123037 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4503 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14123037 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/123037
Line driver with separate pre-driver for feed-through capacitance Mar 14, 2013 Issued
Array ( [id] => 9566563 [patent_doc_number] => 20140184276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'GATE DRIVER' [patent_app_type] => utility [patent_app_number] => 13/842163 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2524 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842163 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842163
Gate driver Mar 14, 2013 Issued
Array ( [id] => 8961269 [patent_doc_number] => 20130200871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'DIRECT DRIVE WAVEFORM AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 13/836641 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7181 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13836641 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/836641
Direct drive waveform amplifier Mar 14, 2013 Issued
Array ( [id] => 9763320 [patent_doc_number] => 08847651 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-30 [patent_title] => 'Apparatus, method and system for implementing a hardware interface pinout' [patent_app_type] => utility [patent_app_number] => 13/844305 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9356 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13844305 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/844305
Apparatus, method and system for implementing a hardware interface pinout Mar 14, 2013 Issued
Array ( [id] => 9524996 [patent_doc_number] => 08749274 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-10 [patent_title] => 'Level sensitive comparing device' [patent_app_type] => utility [patent_app_number] => 13/802826 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3129 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13802826 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/802826
Level sensitive comparing device Mar 13, 2013 Issued
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