Search

John W. Poos

Examiner (ID: 7981, Phone: (571)270-5077 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2896, 2842, 4125
Total Applications
1592
Issued Applications
1425
Pending Applications
126
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9014280 [patent_doc_number] => 20130229244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'SYSTEM AND METHOD FOR PROVIDING AN INTERCHANGEABLE DIELECTRIC FILTER WITHIN A WAVEGUIDE' [patent_app_type] => utility [patent_app_number] => 13/784292 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3884 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13784292 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/784292
System and method for providing an interchangeable dielectric filter within a waveguide Mar 3, 2013 Issued
Array ( [id] => 11911734 [patent_doc_number] => 09780563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Power system control system and distributed controller used in same' [patent_app_type] => utility [patent_app_number] => 14/768938 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 11777 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14768938 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/768938
Power system control system and distributed controller used in same Feb 27, 2013 Issued
Array ( [id] => 10067367 [patent_doc_number] => 09106233 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-08-11 [patent_title] => 'Method and apparatus for synchronization' [patent_app_type] => utility [patent_app_number] => 13/778925 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 15184 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13778925 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/778925
Method and apparatus for synchronization Feb 26, 2013 Issued
Array ( [id] => 9441753 [patent_doc_number] => 08710867 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-29 [patent_title] => 'Electronic system auto-mute control circuit and control method thereof' [patent_app_type] => utility [patent_app_number] => 13/778363 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10892 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13778363 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/778363
Electronic system auto-mute control circuit and control method thereof Feb 26, 2013 Issued
Array ( [id] => 10093420 [patent_doc_number] => 09130252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Symmetric baluns and isolation techniques' [patent_app_type] => utility [patent_app_number] => 13/777482 [patent_app_country] => US [patent_app_date] => 2013-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 5221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777482 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/777482
Symmetric baluns and isolation techniques Feb 25, 2013 Issued
Array ( [id] => 9668620 [patent_doc_number] => 20140232483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'COMBINER FOR AN RF POWER AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 13/773315 [patent_app_country] => US [patent_app_date] => 2013-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7597 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13773315 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/773315
Combiner for an RF power amplifier Feb 20, 2013 Issued
Array ( [id] => 8889111 [patent_doc_number] => 20130162295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'CLOCK GENERATOR INTERMITTENTLY GENERATING SYNCHRONOUS CLOCK' [patent_app_type] => utility [patent_app_number] => 13/772461 [patent_app_country] => US [patent_app_date] => 2013-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9794 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13772461 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/772461
Clock generator intermittently generating synchronous clock Feb 20, 2013 Issued
Array ( [id] => 9558514 [patent_doc_number] => 20140176226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'GATE DRIVER CIRCUIT AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/772537 [patent_app_country] => US [patent_app_date] => 2013-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4256 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13772537 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/772537
Gate driver circuit and operating method thereof Feb 20, 2013 Issued
Array ( [id] => 9474851 [patent_doc_number] => 20140132314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'TRIANGULAR WAVEFORM GENERATING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/770807 [patent_app_country] => US [patent_app_date] => 2013-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5568 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770807 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/770807
TRIANGULAR WAVEFORM GENERATING APPARATUS Feb 18, 2013 Abandoned
Array ( [id] => 10864880 [patent_doc_number] => 08890589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Apparatuses for measuring high speed signals and methods thereof' [patent_app_type] => utility [patent_app_number] => 13/770337 [patent_app_country] => US [patent_app_date] => 2013-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7697 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770337 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/770337
Apparatuses for measuring high speed signals and methods thereof Feb 18, 2013 Issued
Array ( [id] => 9483976 [patent_doc_number] => 08729929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Gate driving circuit' [patent_app_type] => utility [patent_app_number] => 13/766865 [patent_app_country] => US [patent_app_date] => 2013-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6470 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13766865 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/766865
Gate driving circuit Feb 13, 2013 Issued
Array ( [id] => 9654648 [patent_doc_number] => 20140225653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'CASCADED PLL FOR REDUCING LOW-FREQUENCY DRIFT IN HOLDOVER MODE' [patent_app_type] => utility [patent_app_number] => 13/766035 [patent_app_country] => US [patent_app_date] => 2013-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3874 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13766035 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/766035
Cascaded PLL for reducing low-frequency drift in holdover mode Feb 12, 2013 Issued
Array ( [id] => 10099777 [patent_doc_number] => 09136093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Synchronization of RF pulsing with RF metrology, processing, and control' [patent_app_type] => utility [patent_app_number] => 13/761955 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6734 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761955 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/761955
Synchronization of RF pulsing with RF metrology, processing, and control Feb 6, 2013 Issued
Array ( [id] => 9228073 [patent_doc_number] => 08633744 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-01-21 [patent_title] => 'Power reset circuit with zero standby current consumption' [patent_app_type] => utility [patent_app_number] => 13/761271 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3960 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761271 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/761271
Power reset circuit with zero standby current consumption Feb 6, 2013 Issued
Array ( [id] => 9639986 [patent_doc_number] => 20140218097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'SYSTEM AND METHOD FOR A DRIVER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/760676 [patent_app_country] => US [patent_app_date] => 2013-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5348 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13760676 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/760676
System and method for a driver circuit Feb 5, 2013 Issued
Array ( [id] => 9750456 [patent_doc_number] => 08841939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-23 [patent_title] => 'Switching control circuit and switching device' [patent_app_type] => utility [patent_app_number] => 13/758126 [patent_app_country] => US [patent_app_date] => 2013-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13758126 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/758126
Switching control circuit and switching device Feb 3, 2013 Issued
Array ( [id] => 9583179 [patent_doc_number] => 08773182 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-08 [patent_title] => 'Stochastic beating time-to-digital converter (TDC)' [patent_app_type] => utility [patent_app_number] => 13/756670 [patent_app_country] => US [patent_app_date] => 2013-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10247 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13756670 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/756670
Stochastic beating time-to-digital converter (TDC) Jan 31, 2013 Issued
Array ( [id] => 9118805 [patent_doc_number] => 20130285727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'OCTAL CLOCK PHASE INTERPOLATOR ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/755782 [patent_app_country] => US [patent_app_date] => 2013-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1179 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13755782 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/755782
OCTAL CLOCK PHASE INTERPOLATOR ARCHITECTURE Jan 30, 2013 Abandoned
Array ( [id] => 9632421 [patent_doc_number] => 20140210529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'Phase Locked Loop and Method for Operating the Same' [patent_app_type] => utility [patent_app_number] => 13/754168 [patent_app_country] => US [patent_app_date] => 2013-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 15954 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13754168 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/754168
Phase locked loop and method for operating the same Jan 29, 2013 Issued
Array ( [id] => 10172700 [patent_doc_number] => 09203415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Modulated clock synchronizer' [patent_app_type] => utility [patent_app_number] => 14/369118 [patent_app_country] => US [patent_app_date] => 2013-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4774 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14369118 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/369118
Modulated clock synchronizer Jan 21, 2013 Issued
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