Search

John W. Poos

Examiner (ID: 7981, Phone: (571)270-5077 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2896, 2842, 4125
Total Applications
1592
Issued Applications
1425
Pending Applications
126
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9382883 [patent_doc_number] => 20140086364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'APPARATUS AND METHODS FOR QUADRATURE CLOCK SIGNAL GENERATION' [patent_app_type] => utility [patent_app_number] => 13/629170 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8950 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13629170 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/629170
Apparatus and methods for quadrature clock signal generation Sep 26, 2012 Issued
Array ( [id] => 9497504 [patent_doc_number] => 08736325 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-05-27 [patent_title] => 'Wide frequency range clock generation using a single oscillator' [patent_app_type] => utility [patent_app_number] => 13/629377 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2994 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13629377 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/629377
Wide frequency range clock generation using a single oscillator Sep 26, 2012 Issued
Array ( [id] => 9553154 [patent_doc_number] => 08760210 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-24 [patent_title] => 'Multiple samples with delay in oversampling in phase' [patent_app_type] => utility [patent_app_number] => 13/626787 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2196 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626787 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626787
Multiple samples with delay in oversampling in phase Sep 24, 2012 Issued
Array ( [id] => 8743034 [patent_doc_number] => 20130082751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'CONTINUOUS SIGNAL GENERATOR' [patent_app_type] => utility [patent_app_number] => 13/624772 [patent_app_country] => US [patent_app_date] => 2012-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3665 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13624772 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/624772
CONTINUOUS SIGNAL GENERATOR Sep 20, 2012 Abandoned
Array ( [id] => 9414489 [patent_doc_number] => 08698528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'CDR circuit, reception circuit, and electronic device' [patent_app_type] => utility [patent_app_number] => 13/617922 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 15018 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13617922 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/617922
CDR circuit, reception circuit, and electronic device Sep 13, 2012 Issued
Array ( [id] => 9627393 [patent_doc_number] => 08797080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Circuits, apparatuses, and methods for delay models' [patent_app_type] => utility [patent_app_number] => 13/619859 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5304 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13619859 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/619859
Circuits, apparatuses, and methods for delay models Sep 13, 2012 Issued
Array ( [id] => 9172156 [patent_doc_number] => 20130314141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'SIGNAL PROCESSING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/617460 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2889 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13617460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/617460
Signal processing circuit Sep 13, 2012 Issued
Array ( [id] => 9367969 [patent_doc_number] => 20140077842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'ZERO OR ULTRA-LOW DC CURRENT CONSUMPTION POWER-ON AND BROWN-OUT DETECTOR' [patent_app_type] => utility [patent_app_number] => 13/619418 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5953 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13619418 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/619418
Zero or ultra-low DC current consumption power-on and brown-out detector Sep 13, 2012 Issued
Array ( [id] => 8860781 [patent_doc_number] => 08463329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Portable electronic device and method of controlling same' [patent_app_type] => utility [patent_app_number] => 13/620482 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9613 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620482 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/620482
Portable electronic device and method of controlling same Sep 13, 2012 Issued
Array ( [id] => 9390162 [patent_doc_number] => 08686772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Frequency multiplier and method of multiplying frequency' [patent_app_type] => utility [patent_app_number] => 13/613550 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5530 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13613550 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/613550
Frequency multiplier and method of multiplying frequency Sep 12, 2012 Issued
Array ( [id] => 8637810 [patent_doc_number] => 20130029613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'Method and System For Coexistence In A Multiband, Multistandard Communication System Utilizing A Plurality of Phase Locked Loops' [patent_app_type] => utility [patent_app_number] => 13/614113 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10920 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614113 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/614113
Method and system for coexistence in a multiband, multistandard communication system utilizing a plurality of phase locked loops Sep 12, 2012 Issued
Array ( [id] => 9360999 [patent_doc_number] => 20140070871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'LOW POWER ISOLATED OUTPUT CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/608270 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2122 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13608270 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/608270
Low power isolated output circuit Sep 9, 2012 Issued
Array ( [id] => 9360993 [patent_doc_number] => 20140070865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'DEVICE AND METHOD FOR A MULTIPLEXOR/DEMULTIPLEXOR RESET SCHEME' [patent_app_type] => utility [patent_app_number] => 13/607136 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607136 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/607136
Device and method for a multiplexor/demultiplexor reset scheme Sep 6, 2012 Issued
Array ( [id] => 9441757 [patent_doc_number] => 08710871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Delay lines, amplifier systems, transconductance compensating systems and methods of compensating' [patent_app_type] => utility [patent_app_number] => 13/605729 [patent_app_country] => US [patent_app_date] => 2012-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4365 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13605729 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/605729
Delay lines, amplifier systems, transconductance compensating systems and methods of compensating Sep 5, 2012 Issued
Array ( [id] => 9590257 [patent_doc_number] => 08779802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Delay lines, amplifier systems, transconductance compensating systems and methods of compensating' [patent_app_type] => utility [patent_app_number] => 13/605739 [patent_app_country] => US [patent_app_date] => 2012-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4365 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13605739 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/605739
Delay lines, amplifier systems, transconductance compensating systems and methods of compensating Sep 5, 2012 Issued
Array ( [id] => 9335766 [patent_doc_number] => 20140062548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'WIDE-RANGE GLITCH-FREE ASYNCHRONOUS CLOCK SWITCH' [patent_app_type] => utility [patent_app_number] => 13/604795 [patent_app_country] => US [patent_app_date] => 2012-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7489 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604795 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604795
Wide-range glitch-free asynchronous clock switch Sep 5, 2012 Issued
Array ( [id] => 9590299 [patent_doc_number] => 08779845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Semiconductor apparatus' [patent_app_type] => utility [patent_app_number] => 13/604500 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5466 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604500 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604500
Semiconductor apparatus Sep 4, 2012 Issued
Array ( [id] => 9335761 [patent_doc_number] => 20140062543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'DYNAMIC DRIVER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/603815 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3979 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603815 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/603815
Dynamic driver circuit Sep 4, 2012 Issued
Array ( [id] => 9335782 [patent_doc_number] => 20140062564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'PROGRAMMABLE CLOCK DRIVER' [patent_app_type] => utility [patent_app_number] => 13/601175 [patent_app_country] => US [patent_app_date] => 2012-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4252 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13601175 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/601175
Programmable clock driver Aug 30, 2012 Issued
Array ( [id] => 9335783 [patent_doc_number] => 20140062565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'CLOCK DRIVER FOR FREQUENCY-SCALABLE SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/601188 [patent_app_country] => US [patent_app_date] => 2012-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3128 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13601188 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/601188
Clock driver for frequency-scalable systems Aug 30, 2012 Issued
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