John W Woolner
Examiner (ID: 13678)
Most Active Art Unit | 2873 |
Art Unit(s) | 2873 |
Total Applications | 9 |
Issued Applications | 8 |
Pending Applications | 0 |
Abandoned Applications | 1 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
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[id] => 4457678
[patent_doc_number] => 07893518
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[patent_issue_date] => 2011-02-22
[patent_title] => 'Method for generating a layout, use of a transistor layout, and semiconductor circuit'
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[pdf_file] => patents/07/893/07893518.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/111181 | Method for generating a layout, use of a transistor layout, and semiconductor circuit | Apr 27, 2008 | Issued |
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[patent_title] => 'SEMICONDUCTOR DEVICE'
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[patent_issue_date] => 2010-09-28
[patent_title] => 'Plastic ball grid array ruggedization'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/108792 | Plastic ball grid array ruggedization | Apr 23, 2008 | Issued |
Array
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[patent_title] => 'THIN-FILM ALUMINUM NITRIDE ENCAPSULANT FOR METALLIC STRUCTURES ON INTEGRATED CIRCUITS AND METHOD OF FORMING SAME'
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Array
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[patent_title] => 'PROCESS FOR REALIZING AN INTEGRATED ELECTRONIC CIRCUIT WITH TWO ACTIVE LAYER PORTIONS HAVING DIFFERENT CRYSTAL ORIENTATIONS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/104882 | Process for realizing an integrated electronic circuit with two active layer portions having different crystal orientations | Apr 16, 2008 | Issued |
Array
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[patent_title] => 'Vertical double-diffusion metal-oxide-semiconductor transistor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/059281 | Low temperature solder metallurgy and process for packaging applications and structures formed thereby | Mar 30, 2008 | Issued |
Array
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[patent_title] => 'ELECTROMAGNETIC INTERFERENCE SHIELD STRUCTURES FOR SEMICONDUCTOR COMPONENTS'
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Array
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[id] => 168220
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Array
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[id] => 5355126
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/302372 | Method for manufacturing silicon carbide semiconductor element | Mar 26, 2008 | Issued |
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Array
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Array
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