
John Zazworsky
Examiner (ID: 16191)
| Most Active Art Unit | 2504 |
| Art Unit(s) | 2504, 2607, 2107 |
| Total Applications | 1204 |
| Issued Applications | 1067 |
| Pending Applications | 0 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2448141
[patent_doc_number] => 04745311
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-05-17
[patent_title] => 'Solid-state relay'
[patent_app_type] => 1
[patent_app_number] => 7/044482
[patent_app_country] => US
[patent_app_date] => 1987-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3044
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/745/04745311.pdf
[firstpage_image] =>[orig_patent_app_number] => 044482
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/044482 | Solid-state relay | Apr 30, 1987 | Issued |
Array
(
[id] => 2453789
[patent_doc_number] => 04767949
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-08-30
[patent_title] => 'Multibit digital threshold comparator'
[patent_app_type] => 1
[patent_app_number] => 7/044611
[patent_app_country] => US
[patent_app_date] => 1987-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 4361
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/767/04767949.pdf
[firstpage_image] =>[orig_patent_app_number] => 044611
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/044611 | Multibit digital threshold comparator | Apr 30, 1987 | Issued |
Array
(
[id] => 2447139
[patent_doc_number] => 04792704
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-12-20
[patent_title] => 'Scaled voltage level translator circuit'
[patent_app_type] => 1
[patent_app_number] => 7/045348
[patent_app_country] => US
[patent_app_date] => 1987-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1632
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/792/04792704.pdf
[firstpage_image] =>[orig_patent_app_number] => 045348
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/045348 | Scaled voltage level translator circuit | Apr 30, 1987 | Issued |
Array
(
[id] => 2388728
[patent_doc_number] => 04789837
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-12-06
[patent_title] => 'Switched capacitor mixer/multiplier'
[patent_app_type] => 1
[patent_app_number] => 7/041273
[patent_app_country] => US
[patent_app_date] => 1987-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 5
[patent_no_of_words] => 6139
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/789/04789837.pdf
[firstpage_image] =>[orig_patent_app_number] => 041273
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/041273 | Switched capacitor mixer/multiplier | Apr 21, 1987 | Issued |
| 07/039740 | SAMPLING AND HOLDING CIRCUIT FOR SIGNAL HAVING LOW SAMPLING RESIDUAL COMPONENT, ESPECIALLY FOR THE DUAL SAMPLING OF A CORRELATED SIGNAL GIVEN BY A CHARGE-TRANSFER DEVICE | Apr 19, 1987 | Abandoned |
Array
(
[id] => 2496226
[patent_doc_number] => 04825103
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-04-25
[patent_title] => 'Sample-and-hold circuit'
[patent_app_type] => 1
[patent_app_number] => 7/038105
[patent_app_country] => US
[patent_app_date] => 1987-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3819
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/825/04825103.pdf
[firstpage_image] =>[orig_patent_app_number] => 038105
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/038105 | Sample-and-hold circuit | Apr 13, 1987 | Issued |
| 07/035602 | METHOD AND APPARATUS FOR REDUCING TRANSIENT NOISE IN INTEGRATED CIRCUITS | Apr 6, 1987 | Abandoned |
Array
(
[id] => 2448169
[patent_doc_number] => 04749883
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-06-07
[patent_title] => 'Circuit having an output referenced to a specific voltage in response to either an ECL or TTL input'
[patent_app_type] => 1
[patent_app_number] => 7/033959
[patent_app_country] => US
[patent_app_date] => 1987-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1703
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/749/04749883.pdf
[firstpage_image] =>[orig_patent_app_number] => 033959
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/033959 | Circuit having an output referenced to a specific voltage in response to either an ECL or TTL input | Apr 2, 1987 | Issued |
Array
(
[id] => 2530338
[patent_doc_number] => 04797587
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-01-10
[patent_title] => 'Triggering method for a thyristor switch'
[patent_app_type] => 1
[patent_app_number] => 7/031862
[patent_app_country] => US
[patent_app_date] => 1987-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 5688
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/797/04797587.pdf
[firstpage_image] =>[orig_patent_app_number] => 031862
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/031862 | Triggering method for a thyristor switch | Mar 29, 1987 | Issued |
Array
(
[id] => 2389511
[patent_doc_number] => 04737729
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-04-12
[patent_title] => 'Method and circuit for the demodulation of time discrete, frequency modulated signals'
[patent_app_type] => 1
[patent_app_number] => 7/030300
[patent_app_country] => US
[patent_app_date] => 1987-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1868
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/737/04737729.pdf
[firstpage_image] =>[orig_patent_app_number] => 030300
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/030300 | Method and circuit for the demodulation of time discrete, frequency modulated signals | Mar 22, 1987 | Issued |
Array
(
[id] => 2388747
[patent_doc_number] => 04789838
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-12-06
[patent_title] => 'Pulse detection circuit using amplitude and time qualification'
[patent_app_type] => 1
[patent_app_number] => 7/028926
[patent_app_country] => US
[patent_app_date] => 1987-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2169
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/789/04789838.pdf
[firstpage_image] =>[orig_patent_app_number] => 028926
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/028926 | Pulse detection circuit using amplitude and time qualification | Mar 22, 1987 | Issued |
Array
(
[id] => 2420924
[patent_doc_number] => 04771188
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-09-13
[patent_title] => 'Adaptive threshold adjustment method and apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/029310
[patent_app_country] => US
[patent_app_date] => 1987-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2312
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/771/04771188.pdf
[firstpage_image] =>[orig_patent_app_number] => 029310
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/029310 | Adaptive threshold adjustment method and apparatus | Mar 22, 1987 | Issued |
Array
(
[id] => 2417376
[patent_doc_number] => 04743779
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-05-10
[patent_title] => 'Adjustable threshold window circuit'
[patent_app_type] => 1
[patent_app_number] => 7/029353
[patent_app_country] => US
[patent_app_date] => 1987-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1985
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/743/04743779.pdf
[firstpage_image] =>[orig_patent_app_number] => 029353
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/029353 | Adjustable threshold window circuit | Mar 19, 1987 | Issued |
Array
(
[id] => 2479708
[patent_doc_number] => 04812680
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-03-14
[patent_title] => 'High voltage detecting circuit'
[patent_app_type] => 1
[patent_app_number] => 7/027936
[patent_app_country] => US
[patent_app_date] => 1987-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 8977
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 400
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/812/04812680.pdf
[firstpage_image] =>[orig_patent_app_number] => 027936
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/027936 | High voltage detecting circuit | Mar 18, 1987 | Issued |
| 07/028006 | SYNCHRONOUS SIGNAL SEPARATION CIRCUIT | Mar 17, 1987 | Abandoned |
Array
(
[id] => 2455950
[patent_doc_number] => 04760287
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-07-26
[patent_title] => 'Voltage comparator circuit'
[patent_app_type] => 1
[patent_app_number] => 7/027404
[patent_app_country] => US
[patent_app_date] => 1987-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 21
[patent_no_of_words] => 4175
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/760/04760287.pdf
[firstpage_image] =>[orig_patent_app_number] => 027404
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/027404 | Voltage comparator circuit | Mar 17, 1987 | Issued |
Array
(
[id] => 2455896
[patent_doc_number] => 04760284
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-07-26
[patent_title] => 'Pinchoff voltage generator'
[patent_app_type] => 1
[patent_app_number] => 7/025467
[patent_app_country] => US
[patent_app_date] => 1987-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 4553
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/760/04760284.pdf
[firstpage_image] =>[orig_patent_app_number] => 025467
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/025467 | Pinchoff voltage generator | Mar 12, 1987 | Issued |
Array
(
[id] => 2457288
[patent_doc_number] => 04766333
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-08-23
[patent_title] => 'Current sensing differential amplifier'
[patent_app_type] => 1
[patent_app_number] => 7/023184
[patent_app_country] => US
[patent_app_date] => 1987-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6071
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/766/04766333.pdf
[firstpage_image] =>[orig_patent_app_number] => 023184
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/023184 | Current sensing differential amplifier | Mar 8, 1987 | Issued |
| 07/022873 | METHOD OF CORRECTING DEAD TIME | Mar 5, 1987 | Abandoned |
Array
(
[id] => 2457306
[patent_doc_number] => 04766334
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-08-23
[patent_title] => 'Level clamp for Tri-state CMOS bus structure'
[patent_app_type] => 1
[patent_app_number] => 7/020184
[patent_app_country] => US
[patent_app_date] => 1987-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3789
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/766/04766334.pdf
[firstpage_image] =>[orig_patent_app_number] => 020184
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/020184 | Level clamp for Tri-state CMOS bus structure | Feb 26, 1987 | Issued |