
John Zazworsky
Examiner (ID: 16191)
| Most Active Art Unit | 2504 |
| Art Unit(s) | 2504, 2607, 2107 |
| Total Applications | 1204 |
| Issued Applications | 1067 |
| Pending Applications | 0 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2227614
[patent_doc_number] => 04625131
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-11-25
[patent_title] => 'Attenuator circuit'
[patent_app_type] => 1
[patent_app_number] => 6/590095
[patent_app_country] => US
[patent_app_date] => 1984-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3164
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/625/04625131.pdf
[firstpage_image] =>[orig_patent_app_number] => 590095
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/590095 | Attenuator circuit | Mar 15, 1984 | Issued |
Array
(
[id] => 2255036
[patent_doc_number] => 04603265
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-07-29
[patent_title] => 'Josephson device'
[patent_app_type] => 1
[patent_app_number] => 6/589657
[patent_app_country] => US
[patent_app_date] => 1984-03-14
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[firstpage_image] =>[orig_patent_app_number] => 589657
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/589657 | Josephson device | Mar 13, 1984 | Issued |
Array
(
[id] => 2280889
[patent_doc_number] => 04607173
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-08-19
[patent_title] => 'Dual-clock edge triggered flip-flop circuits'
[patent_app_type] => 1
[patent_app_number] => 6/589991
[patent_app_country] => US
[patent_app_date] => 1984-03-14
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[patent_drawing_sheets_cnt] => 4
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[firstpage_image] =>[orig_patent_app_number] => 589991
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/589991 | Dual-clock edge triggered flip-flop circuits | Mar 13, 1984 | Issued |
Array
(
[id] => 2257809
[patent_doc_number] => 04590394
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-05-20
[patent_title] => 'Signal processing circuit with voltage clamped input'
[patent_app_type] => 1
[patent_app_number] => 6/589269
[patent_app_country] => US
[patent_app_date] => 1984-03-13
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 3938
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[pdf_file] => patents/04/590/04590394.pdf
[firstpage_image] =>[orig_patent_app_number] => 589269
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/589269 | Signal processing circuit with voltage clamped input | Mar 12, 1984 | Issued |
Array
(
[id] => 2255078
[patent_doc_number] => 04603267
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-07-29
[patent_title] => 'Low offset single ended MOS comparator'
[patent_app_type] => 1
[patent_app_number] => 6/588573
[patent_app_country] => US
[patent_app_date] => 1984-03-12
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[pdf_file] => patents/04/603/04603267.pdf
[firstpage_image] =>[orig_patent_app_number] => 588573
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/588573 | Low offset single ended MOS comparator | Mar 11, 1984 | Issued |
Array
(
[id] => 2270369
[patent_doc_number] => 04612450
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-09-16
[patent_title] => 'Method of setting a reference value, for example to zero-set a signal source, particularly a transducer'
[patent_app_type] => 1
[patent_app_number] => 6/587499
[patent_app_country] => US
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[pdf_file] => patents/04/612/04612450.pdf
[firstpage_image] =>[orig_patent_app_number] => 587499
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/587499 | Method of setting a reference value, for example to zero-set a signal source, particularly a transducer | Mar 8, 1984 | Issued |
Array
(
[id] => 2245114
[patent_doc_number] => 04622475
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-11-11
[patent_title] => 'Data storage element having input and output ports isolated from regenerative circuit'
[patent_app_type] => 1
[patent_app_number] => 6/585948
[patent_app_country] => US
[patent_app_date] => 1984-03-05
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[pdf_file] => patents/04/622/04622475.pdf
[firstpage_image] =>[orig_patent_app_number] => 585948
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/585948 | Data storage element having input and output ports isolated from regenerative circuit | Mar 4, 1984 | Issued |
Array
(
[id] => 2331797
[patent_doc_number] => 04634899
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-01-06
[patent_title] => 'Current injection logic device with Josephson diode network'
[patent_app_type] => 1
[patent_app_number] => 6/582398
[patent_app_country] => US
[patent_app_date] => 1984-02-24
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 7525
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[pdf_file] => patents/04/634/04634899.pdf
[firstpage_image] =>[orig_patent_app_number] => 582398
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/582398 | Current injection logic device with Josephson diode network | Feb 23, 1984 | Issued |
Array
(
[id] => 2203319
[patent_doc_number] => 04533845
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-08-06
[patent_title] => 'Current limit technique for multiple-emitter vertical power transistor'
[patent_app_type] => 1
[patent_app_number] => 6/582360
[patent_app_country] => US
[patent_app_date] => 1984-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/04/533/04533845.pdf
[firstpage_image] =>[orig_patent_app_number] => 582360
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/582360 | Current limit technique for multiple-emitter vertical power transistor | Feb 21, 1984 | Issued |
| 06/581785 | BIDIRECTIONAL OUTPUT SEMICONDUCTOR FIELD EFFECT TRANSISTOR AND METHOD FOR ITS MANUFACTURE | Feb 20, 1984 | Abandoned |
Array
(
[id] => 2223934
[patent_doc_number] => 04578646
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-03-25
[patent_title] => 'Integral-type small signal input circuit'
[patent_app_type] => 1
[patent_app_number] => 6/577972
[patent_app_country] => US
[patent_app_date] => 1984-02-08
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/578/04578646.pdf
[firstpage_image] =>[orig_patent_app_number] => 577972
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/577972 | Integral-type small signal input circuit | Feb 7, 1984 | Issued |
Array
(
[id] => 2153384
[patent_doc_number] => 04550263
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-29
[patent_title] => 'Waveform generator'
[patent_app_type] => 1
[patent_app_number] => 6/576980
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[pdf_file] => patents/04/550/04550263.pdf
[firstpage_image] =>[orig_patent_app_number] => 576980
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/576980 | Waveform generator | Feb 2, 1984 | Issued |
Array
(
[id] => 2140750
[patent_doc_number] => 04532434
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[firstpage_image] =>[orig_patent_app_number] => 576845
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/576845 | Waveform generator | Feb 2, 1984 | Issued |
Array
(
[id] => 2283962
[patent_doc_number] => 04623804
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[patent_issue_date] => 1986-11-18
[patent_title] => 'Fluxoid type superconducting logic element'
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[patent_app_number] => 6/575523
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[pdf_file] => patents/04/623/04623804.pdf
[firstpage_image] =>[orig_patent_app_number] => 575523
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/575523 | Fluxoid type superconducting logic element | Jan 30, 1984 | Issued |
Array
(
[id] => 2155920
[patent_doc_number] => 04517474
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-05-14
[patent_title] => 'Logic circuit building block and systems constructed from same'
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[pdf_file] => patents/04/517/04517474.pdf
[firstpage_image] =>[orig_patent_app_number] => 572390
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/572390 | Logic circuit building block and systems constructed from same | Jan 19, 1984 | Issued |
Array
(
[id] => 2160796
[patent_doc_number] => 04525638
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[patent_kind] => NA
[patent_issue_date] => 1985-06-25
[patent_title] => 'Zener referenced threshold detector with hysteresis'
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[pdf_file] => patents/04/525/04525638.pdf
[firstpage_image] =>[orig_patent_app_number] => 571232
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/571232 | Zener referenced threshold detector with hysteresis | Jan 15, 1984 | Issued |
Array
(
[id] => 2289192
[patent_doc_number] => 04587438
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[patent_kind] => NA
[patent_issue_date] => 1986-05-06
[patent_title] => 'Turn-off circuit for gate turn-off thyristor'
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[pdf_file] => patents/04/587/04587438.pdf
[firstpage_image] =>[orig_patent_app_number] => 568912
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/568912 | Turn-off circuit for gate turn-off thyristor | Jan 5, 1984 | Issued |
Array
(
[id] => 2235808
[patent_doc_number] => 04600845
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[patent_kind] => NA
[patent_issue_date] => 1986-07-15
[patent_title] => 'Fault-tolerant clock system'
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[patent_app_number] => 6/567249
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[patent_app_date] => 1983-12-30
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[pdf_file] => patents/04/600/04600845.pdf
[firstpage_image] =>[orig_patent_app_number] => 567249
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/567249 | Fault-tolerant clock system | Dec 29, 1983 | Issued |
| 06/567087 | METHOD OF DETECTING LEVEL OF PHASE PULSE SIGNAL | Dec 29, 1983 | Abandoned |
Array
(
[id] => 2268086
[patent_doc_number] => 04593204
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[patent_title] => 'Driver circuits for gate turn-off thyristors and bipolar transistors'
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[firstpage_image] =>[orig_patent_app_number] => 565304
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/565304 | Driver circuits for gate turn-off thyristors and bipolar transistors | Dec 26, 1983 | Issued |