
John Zazworsky
Examiner (ID: 16191)
| Most Active Art Unit | 2504 |
| Art Unit(s) | 2504, 2607, 2107 |
| Total Applications | 1204 |
| Issued Applications | 1067 |
| Pending Applications | 0 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2097367
[patent_doc_number] => 04456839
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-06-26
[patent_title] => 'High gain latching Darlington transistor'
[patent_app_type] => 1
[patent_app_number] => 6/242761
[patent_app_country] => US
[patent_app_date] => 1981-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2299
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/456/04456839.pdf
[firstpage_image] =>[orig_patent_app_number] => 242761
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/242761 | High gain latching Darlington transistor | Mar 10, 1981 | Issued |
| 06/242158 | GATE CIRCUIT OF GATE TURN-OFF THYRISTOR | Mar 8, 1981 | Abandoned |
Array
(
[id] => 2006847
[patent_doc_number] => 04401905
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-08-30
[patent_title] => 'Arrangement for temperature stabilization of a limiter'
[patent_app_type] => 1
[patent_app_number] => 6/240167
[patent_app_country] => US
[patent_app_date] => 1981-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 1483
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[patent_maintenance] => 1
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[pdf_file] => patents/04/401/04401905.pdf
[firstpage_image] =>[orig_patent_app_number] => 240167
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/240167 | Arrangement for temperature stabilization of a limiter | Mar 2, 1981 | Issued |
Array
(
[id] => 2051972
[patent_doc_number] => 04406988
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-09-27
[patent_title] => 'Circuit for processing a digital signal'
[patent_app_type] => 1
[patent_app_number] => 6/238160
[patent_app_country] => US
[patent_app_date] => 1981-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 1954
[patent_no_of_claims] => 15
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[pdf_file] => patents/04/406/04406988.pdf
[firstpage_image] =>[orig_patent_app_number] => 238160
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/238160 | Circuit for processing a digital signal | Mar 1, 1981 | Issued |
Array
(
[id] => 2053853
[patent_doc_number] => 04389579
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-06-21
[patent_title] => 'Sample and hold circuit'
[patent_app_type] => 1
[patent_app_number] => 6/238729
[patent_app_country] => US
[patent_app_date] => 1981-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 2198
[patent_no_of_claims] => 12
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[pdf_file] => patents/04/389/04389579.pdf
[firstpage_image] =>[orig_patent_app_number] => 238729
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/238729 | Sample and hold circuit | Feb 26, 1981 | Issued |
Array
(
[id] => 2055060
[patent_doc_number] => 04417156
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-11-22
[patent_title] => 'Gate circuit for thyristors'
[patent_app_type] => 1
[patent_app_number] => 6/238605
[patent_app_country] => US
[patent_app_date] => 1981-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2263
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/417/04417156.pdf
[firstpage_image] =>[orig_patent_app_number] => 238605
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/238605 | Gate circuit for thyristors | Feb 25, 1981 | Issued |
Array
(
[id] => 2062206
[patent_doc_number] => 04433255
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-02-21
[patent_title] => 'Signal sampling gate circuit'
[patent_app_type] => 1
[patent_app_number] => 6/238024
[patent_app_country] => US
[patent_app_date] => 1981-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/04/433/04433255.pdf
[firstpage_image] =>[orig_patent_app_number] => 238024
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/238024 | Signal sampling gate circuit | Feb 24, 1981 | Issued |
Array
(
[id] => 2062638
[patent_doc_number] => 04409554
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-10-11
[patent_title] => 'Electronic signal simulation device'
[patent_app_type] => 1
[patent_app_number] => 6/237834
[patent_app_country] => US
[patent_app_date] => 1981-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/409/04409554.pdf
[firstpage_image] =>[orig_patent_app_number] => 237834
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/237834 | Electronic signal simulation device | Feb 24, 1981 | Issued |
Array
(
[id] => 2097352
[patent_doc_number] => 04456838
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-06-26
[patent_title] => 'Level shifting circuit'
[patent_app_type] => 1
[patent_app_number] => 6/238025
[patent_app_country] => US
[patent_app_date] => 1981-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3418
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/456/04456838.pdf
[firstpage_image] =>[orig_patent_app_number] => 238025
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/238025 | Level shifting circuit | Feb 24, 1981 | Issued |
Array
(
[id] => 1986657
[patent_doc_number] => 04357547
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-11-02
[patent_title] => 'EFL Toggle flip-flop'
[patent_app_type] => 1
[patent_app_number] => 6/237322
[patent_app_country] => US
[patent_app_date] => 1981-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 3197
[patent_no_of_claims] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/357/04357547.pdf
[firstpage_image] =>[orig_patent_app_number] => 237322
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/237322 | EFL Toggle flip-flop | Feb 22, 1981 | Issued |
Array
(
[id] => 2027782
[patent_doc_number] => 04420698
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-12-13
[patent_title] => 'Peak detector'
[patent_app_type] => 1
[patent_app_number] => 6/236358
[patent_app_country] => US
[patent_app_date] => 1981-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_claims] => 9
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[pdf_file] => patents/04/420/04420698.pdf
[firstpage_image] =>[orig_patent_app_number] => 236358
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/236358 | Peak detector | Feb 19, 1981 | Issued |
Array
(
[id] => 1983458
[patent_doc_number] => 04363977
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-12-14
[patent_title] => 'Device for discriminating between two values of a signal with DC offset compensation'
[patent_app_type] => 1
[patent_app_number] => 6/236609
[patent_app_country] => US
[patent_app_date] => 1981-02-20
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/363/04363977.pdf
[firstpage_image] =>[orig_patent_app_number] => 236609
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/236609 | Device for discriminating between two values of a signal with DC offset compensation | Feb 19, 1981 | Issued |
Array
(
[id] => 2088469
[patent_doc_number] => 04438350
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-03-20
[patent_title] => 'Logic circuit building block and systems constructed from same'
[patent_app_type] => 1
[patent_app_number] => 6/235635
[patent_app_country] => US
[patent_app_date] => 1981-02-18
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[pdf_file] => patents/04/438/04438350.pdf
[firstpage_image] =>[orig_patent_app_number] => 235635
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/235635 | Logic circuit building block and systems constructed from same | Feb 17, 1981 | Issued |
Array
(
[id] => 1999496
[patent_doc_number] => 04374362
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-02-15
[patent_title] => 'Instrument zeroing circuit'
[patent_app_type] => 1
[patent_app_number] => 6/235151
[patent_app_country] => US
[patent_app_date] => 1981-02-17
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[pdf_file] => patents/04/374/04374362.pdf
[firstpage_image] =>[orig_patent_app_number] => 235151
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/235151 | Instrument zeroing circuit | Feb 16, 1981 | Issued |
Array
(
[id] => 2020302
[patent_doc_number] => 04400631
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-08-23
[patent_title] => 'High current gain Josephson junction circuit'
[patent_app_type] => 1
[patent_app_number] => 6/233949
[patent_app_country] => US
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[pdf_file] => patents/04/400/04400631.pdf
[firstpage_image] =>[orig_patent_app_number] => 233949
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/233949 | High current gain Josephson junction circuit | Feb 11, 1981 | Issued |
Array
(
[id] => 2023188
[patent_doc_number] => 04373138
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-02-08
[patent_title] => 'Hybrid unlatching flip-flop logic element'
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[patent_app_number] => 6/232011
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[patent_app_date] => 1981-02-06
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[pdf_file] => patents/04/373/04373138.pdf
[firstpage_image] =>[orig_patent_app_number] => 232011
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/232011 | Hybrid unlatching flip-flop logic element | Feb 5, 1981 | Issued |
Array
(
[id] => 2266662
[patent_doc_number] => 04580069
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-04-01
[patent_title] => 'Comparator'
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[patent_app_number] => 6/229482
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[pdf_file] => patents/04/580/04580069.pdf
[firstpage_image] =>[orig_patent_app_number] => 229482
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/229482 | Comparator | Jan 28, 1981 | Issued |
Array
(
[id] => 2023218
[patent_doc_number] => 04373141
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-02-08
[patent_title] => 'Fast updating peak detector circuit'
[patent_app_type] => 1
[patent_app_number] => 6/227254
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[patent_app_date] => 1981-01-22
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[pdf_file] => patents/04/373/04373141.pdf
[firstpage_image] =>[orig_patent_app_number] => 227254
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/227254 | Fast updating peak detector circuit | Jan 21, 1981 | Issued |
Array
(
[id] => 1999208
[patent_doc_number] => 04374331
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-02-15
[patent_title] => 'D-Type flip-flop circuit'
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[patent_app_number] => 6/227562
[patent_app_country] => US
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[pdf_file] => patents/04/374/04374331.pdf
[firstpage_image] =>[orig_patent_app_number] => 227562
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/227562 | D-Type flip-flop circuit | Jan 21, 1981 | Issued |
Array
(
[id] => 1983453
[patent_doc_number] => 04363976
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-12-14
[patent_title] => 'Subinterval sampler'
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[patent_app_number] => 6/226321
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[pdf_file] => patents/04/363/04363976.pdf
[firstpage_image] =>[orig_patent_app_number] => 226321
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/226321 | Subinterval sampler | Jan 18, 1981 | Issued |