Search

John Zazworsky

Examiner (ID: 16191)

Most Active Art Unit
2504
Art Unit(s)
2504, 2607, 2107
Total Applications
1204
Issued Applications
1067
Pending Applications
0
Abandoned Applications
137

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1944757 [patent_doc_number] => 04309625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-05 [patent_title] => 'Flip-flop circuit' [patent_app_type] => 1 [patent_app_number] => 6/089743 [patent_app_country] => US [patent_app_date] => 1979-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3293 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/309/04309625.pdf [firstpage_image] =>[orig_patent_app_number] => 089743 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/089743
Flip-flop circuit Oct 30, 1979 Issued
Array ( [id] => 1925941 [patent_doc_number] => 04298809 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-03 [patent_title] => 'Gate circuit for gate turn-off thyristor' [patent_app_type] => 1 [patent_app_number] => 6/078470 [patent_app_country] => US [patent_app_date] => 1979-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3318 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/298/04298809.pdf [firstpage_image] =>[orig_patent_app_number] => 078470 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/078470
Gate circuit for gate turn-off thyristor Sep 23, 1979 Issued
Array ( [id] => 1926099 [patent_doc_number] => 04298841 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-03 [patent_title] => 'Signal envelope detecting system' [patent_app_type] => 1 [patent_app_number] => 6/075616 [patent_app_country] => US [patent_app_date] => 1979-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2522 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/298/04298841.pdf [firstpage_image] =>[orig_patent_app_number] => 075616 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/075616
Signal envelope detecting system Sep 13, 1979 Issued
Array ( [id] => 1900508 [patent_doc_number] => 04293817 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-06 [patent_title] => 'Signal amplitude range compression employing pulse modulation' [patent_app_type] => 1 [patent_app_number] => 6/074642 [patent_app_country] => US [patent_app_date] => 1979-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2893 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/293/04293817.pdf [firstpage_image] =>[orig_patent_app_number] => 074642 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/074642
Signal amplitude range compression employing pulse modulation Sep 11, 1979 Issued
Array ( [id] => 1865600 [patent_doc_number] => 04295099 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-13 [patent_title] => 'Peak detector' [patent_app_type] => 1 [patent_app_number] => 6/072572 [patent_app_country] => US [patent_app_date] => 1979-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2284 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/295/04295099.pdf [firstpage_image] =>[orig_patent_app_number] => 072572 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/072572
Peak detector Sep 4, 1979 Issued
Array ( [id] => 1955330 [patent_doc_number] => 04326134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-04-20 [patent_title] => 'Integrated rise-time regulated voltage generator systems' [patent_app_type] => 1 [patent_app_number] => 6/071498 [patent_app_country] => US [patent_app_date] => 1979-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7945 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/326/04326134.pdf [firstpage_image] =>[orig_patent_app_number] => 071498 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/071498
Integrated rise-time regulated voltage generator systems Aug 30, 1979 Issued
Array ( [id] => 1951532 [patent_doc_number] => 04313066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-26 [patent_title] => 'Direct coupled nonlinear injection Josephson logic circuits' [patent_app_type] => 1 [patent_app_number] => 6/068299 [patent_app_country] => US [patent_app_date] => 1979-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4586 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/313/04313066.pdf [firstpage_image] =>[orig_patent_app_number] => 068299 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/068299
Direct coupled nonlinear injection Josephson logic circuits Aug 19, 1979 Issued
Array ( [id] => 1899856 [patent_doc_number] => 04301381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-17 [patent_title] => 'TTL-Compatible address latch with field effect transistors' [patent_app_type] => 1 [patent_app_number] => 6/066595 [patent_app_country] => US [patent_app_date] => 1979-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3493 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/301/04301381.pdf [firstpage_image] =>[orig_patent_app_number] => 066595 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/066595
TTL-Compatible address latch with field effect transistors Aug 13, 1979 Issued
Array ( [id] => 1997943 [patent_doc_number] => 04323799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-04-06 [patent_title] => 'Impulse activated time delay self-restoring switch' [patent_app_type] => 1 [patent_app_number] => 6/065184 [patent_app_country] => US [patent_app_date] => 1979-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2932 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/323/04323799.pdf [firstpage_image] =>[orig_patent_app_number] => 065184 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/065184
Impulse activated time delay self-restoring switch Aug 8, 1979 Issued
Array ( [id] => 1906482 [patent_doc_number] => 04302689 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-24 [patent_title] => 'Sample and hold circuit' [patent_app_type] => 1 [patent_app_number] => 6/062922 [patent_app_country] => US [patent_app_date] => 1979-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 4257 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/302/04302689.pdf [firstpage_image] =>[orig_patent_app_number] => 062922 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/062922
Sample and hold circuit Aug 1, 1979 Issued
Array ( [id] => 1873161 [patent_doc_number] => 04292675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-29 [patent_title] => 'Five device merged transistor RAM cell' [patent_app_type] => 1 [patent_app_number] => 6/061973 [patent_app_country] => US [patent_app_date] => 1979-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2695 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/292/04292675.pdf [firstpage_image] =>[orig_patent_app_number] => 061973 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/061973
Five device merged transistor RAM cell Jul 29, 1979 Issued
Array ( [id] => 1919343 [patent_doc_number] => 04277699 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-07-07 [patent_title] => 'Latch circuit operable as a D-type edge trigger' [patent_app_type] => 1 [patent_app_number] => 6/060933 [patent_app_country] => US [patent_app_date] => 1979-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2553 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/277/04277699.pdf [firstpage_image] =>[orig_patent_app_number] => 060933 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/060933
Latch circuit operable as a D-type edge trigger Jul 25, 1979 Issued
Array ( [id] => 1936525 [patent_doc_number] => 04324989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-04-13 [patent_title] => 'Solid-state relay' [patent_app_type] => 1 [patent_app_number] => 6/058466 [patent_app_country] => US [patent_app_date] => 1979-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2065 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/324/04324989.pdf [firstpage_image] =>[orig_patent_app_number] => 058466 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/058466
Solid-state relay Jul 17, 1979 Issued
Array ( [id] => 1974352 [patent_doc_number] => 04311927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-19 [patent_title] => 'Transistor logic tristate device with reduced output capacitance' [patent_app_type] => 1 [patent_app_number] => 6/058674 [patent_app_country] => US [patent_app_date] => 1979-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4997 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/311/04311927.pdf [firstpage_image] =>[orig_patent_app_number] => 058674 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/058674
Transistor logic tristate device with reduced output capacitance Jul 17, 1979 Issued
Array ( [id] => 1928361 [patent_doc_number] => 04287434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-01 [patent_title] => 'Semiconductor switch device' [patent_app_type] => 1 [patent_app_number] => 6/058329 [patent_app_country] => US [patent_app_date] => 1979-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4177 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/287/04287434.pdf [firstpage_image] =>[orig_patent_app_number] => 058329 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/058329
Semiconductor switch device Jul 16, 1979 Issued
Array ( [id] => 1927902 [patent_doc_number] => 04284911 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-08-18 [patent_title] => 'Switching network' [patent_app_type] => 1 [patent_app_number] => 6/058024 [patent_app_country] => US [patent_app_date] => 1979-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1682 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/284/04284911.pdf [firstpage_image] =>[orig_patent_app_number] => 058024 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/058024
Switching network Jul 15, 1979 Issued
Array ( [id] => 1919319 [patent_doc_number] => 04277695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-07-07 [patent_title] => 'Amplifier having dead zone of controllable width and position' [patent_app_type] => 1 [patent_app_number] => 6/058022 [patent_app_country] => US [patent_app_date] => 1979-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4581 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/277/04277695.pdf [firstpage_image] =>[orig_patent_app_number] => 058022 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/058022
Amplifier having dead zone of controllable width and position Jul 15, 1979 Issued
Array ( [id] => 1865433 [patent_doc_number] => 04295063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-13 [patent_title] => 'Fast settling digital to analog converter bit switch' [patent_app_type] => 1 [patent_app_number] => 6/053131 [patent_app_country] => US [patent_app_date] => 1979-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1547 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 415 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/295/04295063.pdf [firstpage_image] =>[orig_patent_app_number] => 053131 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/053131
Fast settling digital to analog converter bit switch Jun 27, 1979 Issued
Array ( [id] => 1965097 [patent_doc_number] => 04315220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-02-09 [patent_title] => 'Peak detector circuit' [patent_app_type] => 1 [patent_app_number] => 6/051964 [patent_app_country] => US [patent_app_date] => 1979-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2758 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/315/04315220.pdf [firstpage_image] =>[orig_patent_app_number] => 051964 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/051964
Peak detector circuit Jun 24, 1979 Issued
Array ( [id] => 1885747 [patent_doc_number] => 04297594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-27 [patent_title] => 'Gate circuit for a gate turn-off thyristor' [patent_app_type] => 1 [patent_app_number] => 6/050522 [patent_app_country] => US [patent_app_date] => 1979-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4009 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/297/04297594.pdf [firstpage_image] =>[orig_patent_app_number] => 050522 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/050522
Gate circuit for a gate turn-off thyristor Jun 20, 1979 Issued
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