
John Zazworsky
Examiner (ID: 16191)
| Most Active Art Unit | 2504 |
| Art Unit(s) | 2504, 2607, 2107 |
| Total Applications | 1204 |
| Issued Applications | 1067 |
| Pending Applications | 0 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2904357
[patent_doc_number] => 05272668
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-21
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/678388
[patent_app_country] => US
[patent_app_date] => 1991-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4795
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/272/05272668.pdf
[firstpage_image] =>[orig_patent_app_number] => 678388
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/678388 | Semiconductor memory | Mar 31, 1991 | Issued |
Array
(
[id] => 2959805
[patent_doc_number] => 05243234
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-07
[patent_title] => 'Dual gate LDMOSFET device for reducing on state resistance'
[patent_app_type] => 1
[patent_app_number] => 7/673973
[patent_app_country] => US
[patent_app_date] => 1991-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 15
[patent_no_of_words] => 2529
[patent_no_of_claims] => 13
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[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/243/05243234.pdf
[firstpage_image] =>[orig_patent_app_number] => 673973
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/673973 | Dual gate LDMOSFET device for reducing on state resistance | Mar 19, 1991 | Issued |
Array
(
[id] => 2859516
[patent_doc_number] => 05113091
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-12
[patent_title] => 'Apparatus and method for comparing signals'
[patent_app_type] => 1
[patent_app_number] => 7/672146
[patent_app_country] => US
[patent_app_date] => 1991-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4476
[patent_no_of_claims] => 14
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[patent_words_short_claim] => 126
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/113/05113091.pdf
[firstpage_image] =>[orig_patent_app_number] => 672146
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/672146 | Apparatus and method for comparing signals | Mar 18, 1991 | Issued |
Array
(
[id] => 2778580
[patent_doc_number] => 05132558
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-21
[patent_title] => 'Recycling ramp interpolator'
[patent_app_type] => 1
[patent_app_number] => 7/672145
[patent_app_country] => US
[patent_app_date] => 1991-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4105
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/132/05132558.pdf
[firstpage_image] =>[orig_patent_app_number] => 672145
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/672145 | Recycling ramp interpolator | Mar 18, 1991 | Issued |
Array
(
[id] => 2967853
[patent_doc_number] => 05264735
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-23
[patent_title] => 'Superconducting non-linear device'
[patent_app_type] => 1
[patent_app_number] => 7/671589
[patent_app_country] => US
[patent_app_date] => 1991-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3468
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/264/05264735.pdf
[firstpage_image] =>[orig_patent_app_number] => 671589
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/671589 | Superconducting non-linear device | Mar 18, 1991 | Issued |
Array
(
[id] => 2803505
[patent_doc_number] => 05140188
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-18
[patent_title] => 'High speed latching comparator using devices with negative impedance'
[patent_app_type] => 1
[patent_app_number] => 7/671585
[patent_app_country] => US
[patent_app_date] => 1991-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4176
[patent_no_of_claims] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/140/05140188.pdf
[firstpage_image] =>[orig_patent_app_number] => 671585
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/671585 | High speed latching comparator using devices with negative impedance | Mar 18, 1991 | Issued |
Array
(
[id] => 2996472
[patent_doc_number] => 05212665
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-18
[patent_title] => 'Internal address determining device for semiconductor memory devices'
[patent_app_type] => 1
[patent_app_number] => 7/668639
[patent_app_country] => US
[patent_app_date] => 1991-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3313
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/212/05212665.pdf
[firstpage_image] =>[orig_patent_app_number] => 668639
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/668639 | Internal address determining device for semiconductor memory devices | Mar 12, 1991 | Issued |
Array
(
[id] => 2902612
[patent_doc_number] => 05272577
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-21
[patent_title] => 'Index adjustment circuit for floppy disk drive'
[patent_app_type] => 1
[patent_app_number] => 7/668181
[patent_app_country] => US
[patent_app_date] => 1991-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3131
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/272/05272577.pdf
[firstpage_image] =>[orig_patent_app_number] => 668181
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/668181 | Index adjustment circuit for floppy disk drive | Mar 11, 1991 | Issued |
Array
(
[id] => 2961429
[patent_doc_number] => 05243321
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-07
[patent_title] => 'Display control apparatus enabling clear display of operation performance of an arithmetic processor'
[patent_app_type] => 1
[patent_app_number] => 7/667310
[patent_app_country] => US
[patent_app_date] => 1991-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3521
[patent_no_of_claims] => 5
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/243/05243321.pdf
[firstpage_image] =>[orig_patent_app_number] => 667310
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/667310 | Display control apparatus enabling clear display of operation performance of an arithmetic processor | Mar 11, 1991 | Issued |
Array
(
[id] => 2951042
[patent_doc_number] => 05180932
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-01-19
[patent_title] => 'Current mode multiplexed sample and hold circuit'
[patent_app_type] => 1
[patent_app_number] => 7/668379
[patent_app_country] => US
[patent_app_date] => 1991-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 27
[patent_no_of_words] => 17944
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 280
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/180/05180932.pdf
[firstpage_image] =>[orig_patent_app_number] => 668379
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/668379 | Current mode multiplexed sample and hold circuit | Mar 10, 1991 | Issued |
| 07/663716 | MEMORY CIRCUIT WITH ELEMENT FOR THE MEMORIZING OF WORD LINE SELECTION FOR AN ERASURE OF A BLOCK OF INFORMATION | Mar 3, 1991 | Abandoned |
Array
(
[id] => 2872024
[patent_doc_number] => 05097146
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-17
[patent_title] => 'Circuit for detecting high voltage level in MOS technology'
[patent_app_type] => 1
[patent_app_number] => 7/658449
[patent_app_country] => US
[patent_app_date] => 1991-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2143
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/097/05097146.pdf
[firstpage_image] =>[orig_patent_app_number] => 658449
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/658449 | Circuit for detecting high voltage level in MOS technology | Feb 21, 1991 | Issued |
| 07/654341 | GAIN LINEARITY CORRECTION CIRCUIT FOR MOS CIRCUITS | Feb 11, 1991 | Abandoned |
Array
(
[id] => 2806596
[patent_doc_number] => 05124583
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-23
[patent_title] => 'DC-powered Josephson integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 7/650933
[patent_app_country] => US
[patent_app_date] => 1991-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[pdf_file] => patents/05/124/05124583.pdf
[firstpage_image] =>[orig_patent_app_number] => 650933
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/650933 | DC-powered Josephson integrated circuit | Feb 4, 1991 | Issued |
Array
(
[id] => 2874216
[patent_doc_number] => 05162682
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-10
[patent_title] => 'Solid state relay employing triacs and plurality of snubber circuits'
[patent_app_type] => 1
[patent_app_number] => 7/645036
[patent_app_country] => US
[patent_app_date] => 1991-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3540
[patent_no_of_claims] => 12
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/162/05162682.pdf
[firstpage_image] =>[orig_patent_app_number] => 645036
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/645036 | Solid state relay employing triacs and plurality of snubber circuits | Jan 21, 1991 | Issued |
Array
(
[id] => 3044150
[patent_doc_number] => 05286710
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-15
[patent_title] => 'Superconductive alloys having bifurcated critical current density and method of preparation'
[patent_app_type] => 1
[patent_app_number] => 7/644175
[patent_app_country] => US
[patent_app_date] => 1991-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3846
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/286/05286710.pdf
[firstpage_image] =>[orig_patent_app_number] => 644175
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/644175 | Superconductive alloys having bifurcated critical current density and method of preparation | Jan 21, 1991 | Issued |
Array
(
[id] => 2920384
[patent_doc_number] => 05179293
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-01-12
[patent_title] => 'Bipolar output stage switching circuit'
[patent_app_type] => 1
[patent_app_number] => 7/641340
[patent_app_country] => US
[patent_app_date] => 1991-01-15
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[pdf_file] => patents/05/179/05179293.pdf
[firstpage_image] =>[orig_patent_app_number] => 641340
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/641340 | Bipolar output stage switching circuit | Jan 14, 1991 | Issued |
Array
(
[id] => 2872135
[patent_doc_number] => 05097152
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-17
[patent_title] => 'Buffer circuit used in a semiconductor device operating by different supply potentials and method of operating the same'
[patent_app_type] => 1
[patent_app_number] => 7/639474
[patent_app_country] => US
[patent_app_date] => 1991-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/097/05097152.pdf
[firstpage_image] =>[orig_patent_app_number] => 639474
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/639474 | Buffer circuit used in a semiconductor device operating by different supply potentials and method of operating the same | Jan 9, 1991 | Issued |
Array
(
[id] => 2825846
[patent_doc_number] => 05173620
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-22
[patent_title] => 'Device for eliminating trap of magnetic flux in a superconduction circuit'
[patent_app_type] => 1
[patent_app_number] => 7/627033
[patent_app_country] => US
[patent_app_date] => 1990-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 23
[patent_no_of_words] => 6681
[patent_no_of_claims] => 22
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/173/05173620.pdf
[firstpage_image] =>[orig_patent_app_number] => 627033
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/627033 | Device for eliminating trap of magnetic flux in a superconduction circuit | Dec 12, 1990 | Issued |
| 07/616733 | DETECTION VOLTAGE OUTPUT CIRCUIT OF CHARGE GENERATION TYPE SENSING DEVICE | Nov 20, 1990 | Abandoned |