Search

Johnny H. Hoang

Examiner (ID: 9632, Phone: (571)272-4843 , Office: P/3747 )

Most Active Art Unit
3747
Art Unit(s)
3747
Total Applications
2118
Issued Applications
1888
Pending Applications
93
Abandoned Applications
174

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8506617 [patent_doc_number] => 20120306025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'Integrated Circuit Including Cross-Coupled Transistors with Two Transistors of Different Type Having Gate Electrodes Formed by Common Gate Level Feature with Shared Diffusion Regions on Opposite Sides of Common Gate Level Feature' [patent_app_type] => utility [patent_app_number] => 13/589028 [patent_app_country] => US [patent_app_date] => 2012-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 212 [patent_figures_cnt] => 212 [patent_no_of_words] => 31224 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589028 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/589028
Integrated circuit including cross-coupled transistors with two transistors of different type having gate electrodes formed by common gate level feature with shared diffusion regions on opposite sides of common gate level feature Aug 16, 2012 Issued
Array ( [id] => 8499695 [patent_doc_number] => 20120299103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'RAISED SOURCE/DRAIN STRUCTURE FOR ENHANCED STRAIN COUPLING FROM STRESS LINER' [patent_app_type] => utility [patent_app_number] => 13/570833 [patent_app_country] => US [patent_app_date] => 2012-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3378 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13570833 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/570833
Raised source/drain structure for enhanced strain coupling from stress liner Aug 8, 2012 Issued
Array ( [id] => 8486943 [patent_doc_number] => 20120286350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'TUNNEL FIELD EFFECT TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/558518 [patent_app_country] => US [patent_app_date] => 2012-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4621 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13558518 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/558518
Tunnel field effect transistor Jul 25, 2012 Issued
Array ( [id] => 9530083 [patent_doc_number] => 08753954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Semiconductor device having capacitors fixed to support patterns and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/553078 [patent_app_country] => US [patent_app_date] => 2012-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3010 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13553078 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/553078
Semiconductor device having capacitors fixed to support patterns and method for manufacturing the same Jul 18, 2012 Issued
Array ( [id] => 8995494 [patent_doc_number] => 08519380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-27 [patent_title] => 'Low thermal conductivity material' [patent_app_type] => utility [patent_app_number] => 13/537164 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6126 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13537164 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/537164
Low thermal conductivity material Jun 28, 2012 Issued
Array ( [id] => 8368117 [patent_doc_number] => 20120217508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'Semiconductor White Light Sources' [patent_app_type] => utility [patent_app_number] => 13/463266 [patent_app_country] => US [patent_app_date] => 2012-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6259 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13463266 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/463266
Semiconductor White Light Sources May 2, 2012 Abandoned
Array ( [id] => 8310339 [patent_doc_number] => 20120187362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'Phase Change Memory Cell Structure' [patent_app_type] => utility [patent_app_number] => 13/436203 [patent_app_country] => US [patent_app_date] => 2012-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9391 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13436203 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/436203
Phase change memory cell structure Mar 29, 2012 Issued
Array ( [id] => 8289905 [patent_doc_number] => 20120178237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'DEEP WELL STRUCTURES WITH SINGLE DEPTH SHALLOW TRENCH ISOLATION REGIONS' [patent_app_type] => utility [patent_app_number] => 13/418994 [patent_app_country] => US [patent_app_date] => 2012-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2890 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13418994 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/418994
Deep well structures with single depth shallow trench isolation regions Mar 12, 2012 Issued
Array ( [id] => 9711418 [patent_doc_number] => 08835993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Gate-all-around integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 13/411699 [patent_app_country] => US [patent_app_date] => 2012-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 50 [patent_no_of_words] => 10677 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13411699 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/411699
Gate-all-around integrated circuit devices Mar 4, 2012 Issued
Array ( [id] => 9883281 [patent_doc_number] => 08970048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Interconnect structure for high frequency signal transmissions' [patent_app_type] => utility [patent_app_number] => 13/340764 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3419 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340764 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340764
Interconnect structure for high frequency signal transmissions Dec 29, 2011 Issued
Array ( [id] => 9971666 [patent_doc_number] => 09018681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Method of manufacturing a bipolar transistor and bipolar transistor' [patent_app_type] => utility [patent_app_number] => 13/303099 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3581 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13303099 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/303099
Method of manufacturing a bipolar transistor and bipolar transistor Nov 21, 2011 Issued
Array ( [id] => 10898745 [patent_doc_number] => 08921968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Selective emitter solar cells formed by a hybrid diffusion and ion implantation process' [patent_app_type] => utility [patent_app_number] => 13/301372 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8948 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301372 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301372
Selective emitter solar cells formed by a hybrid diffusion and ion implantation process Nov 20, 2011 Issued
Array ( [id] => 9059728 [patent_doc_number] => 08546164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Method of manufacturing display device including thin film transistor' [patent_app_type] => utility [patent_app_number] => 13/293158 [patent_app_country] => US [patent_app_date] => 2011-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4916 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13293158 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/293158
Method of manufacturing display device including thin film transistor Nov 9, 2011 Issued
Array ( [id] => 9413461 [patent_doc_number] => 08697497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Module with silicon-based layer' [patent_app_type] => utility [patent_app_number] => 13/281955 [patent_app_country] => US [patent_app_date] => 2011-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3381 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13281955 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/281955
Module with silicon-based layer Oct 25, 2011 Issued
Array ( [id] => 7743420 [patent_doc_number] => 20120021540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/244397 [patent_app_country] => US [patent_app_date] => 2011-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 28306 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20120021540.pdf [firstpage_image] =>[orig_patent_app_number] => 13244397 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/244397
Semiconductor device and method for manufacturing semiconductor device Sep 23, 2011 Issued
Array ( [id] => 8982623 [patent_doc_number] => 08513741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Logic circuits using carbon nanotube transistors' [patent_app_type] => utility [patent_app_number] => 13/216120 [patent_app_country] => US [patent_app_date] => 2011-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13216120 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216120
Logic circuits using carbon nanotube transistors Aug 22, 2011 Issued
Array ( [id] => 7654717 [patent_doc_number] => 20110303986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-15 [patent_title] => 'COAXIAL TRANSISTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/214784 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4047 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20110303986.pdf [firstpage_image] =>[orig_patent_app_number] => 13214784 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214784
Coaxial transistor structure Aug 21, 2011 Issued
Array ( [id] => 9692413 [patent_doc_number] => 08823011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'High linearity bandgap engineered transistor' [patent_app_type] => utility [patent_app_number] => 13/211530 [patent_app_country] => US [patent_app_date] => 2011-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4670 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13211530 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/211530
High linearity bandgap engineered transistor Aug 16, 2011 Issued
Array ( [id] => 8668945 [patent_doc_number] => 20130043483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'HIGH LINEARITY HYBRID TRANSISTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/211541 [patent_app_country] => US [patent_app_date] => 2011-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7380 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13211541 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/211541
High linearity hybrid transistor device Aug 16, 2011 Issued
Array ( [id] => 10857359 [patent_doc_number] => 08883555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Electronic device, manufacturing method of electronic device, and sputtering target' [patent_app_type] => utility [patent_app_number] => 13/211542 [patent_app_country] => US [patent_app_date] => 2011-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 39 [patent_no_of_words] => 16089 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13211542 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/211542
Electronic device, manufacturing method of electronic device, and sputtering target Aug 16, 2011 Issued
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