
Johnny H. Hoang
Examiner (ID: 9632, Phone: (571)272-4843 , Office: P/3747 )
| Most Active Art Unit | 3747 |
| Art Unit(s) | 3747 |
| Total Applications | 2118 |
| Issued Applications | 1888 |
| Pending Applications | 93 |
| Abandoned Applications | 174 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8702001
[patent_doc_number] => 08395224
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-12
[patent_title] => 'Linear gate level cross-coupled transistor device with non-overlapping PMOS transistors and non-overlapping NMOS transistors relative to directions of gate electrodes'
[patent_app_type] => utility
[patent_app_number] => 12/753758
[patent_app_country] => US
[patent_app_date] => 2010-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
[patent_figures_cnt] => 49
[patent_no_of_words] => 20450
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 762
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12753758
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/753758 | Linear gate level cross-coupled transistor device with non-overlapping PMOS transistors and non-overlapping NMOS transistors relative to directions of gate electrodes | Apr 1, 2010 | Issued |
Array
(
[id] => 8386645
[patent_doc_number] => 08264044
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-09-11
[patent_title] => 'Integrated circuit including cross-coupled transistors having two complementary pairs of co-aligned gate electrodes with offset contacting structures positioned between transistors of different type'
[patent_app_type] => utility
[patent_app_number] => 12/753711
[patent_app_country] => US
[patent_app_date] => 2010-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 52
[patent_figures_cnt] => 53
[patent_no_of_words] => 21460
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 515
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12753711
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/753711 | Integrated circuit including cross-coupled transistors having two complementary pairs of co-aligned gate electrodes with offset contacting structures positioned between transistors of different type | Apr 1, 2010 | Issued |
Array
(
[id] => 8214018
[patent_doc_number] => 08193035
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-05
[patent_title] => 'Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumps'
[patent_app_type] => utility
[patent_app_number] => 12/731354
[patent_app_country] => US
[patent_app_date] => 2010-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 6179
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/193/08193035.pdf
[firstpage_image] =>[orig_patent_app_number] => 12731354
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/731354 | Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumps | Mar 24, 2010 | Issued |
Array
(
[id] => 6383797
[patent_doc_number] => 20100176510
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-15
[patent_title] => 'Fusible I/O Interconnection Systems and Methods for Flip-Chip Packaging Involving Substrate-Mounted Stud Bumps'
[patent_app_type] => utility
[patent_app_number] => 12/731330
[patent_app_country] => US
[patent_app_date] => 2010-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6179
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0176/20100176510.pdf
[firstpage_image] =>[orig_patent_app_number] => 12731330
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/731330 | Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumps | Mar 24, 2010 | Issued |
Array
(
[id] => 7490297
[patent_doc_number] => 08030122
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-10-04
[patent_title] => 'Method and apparatus for reduction of non-adaptive signals in photo-EMF sensors'
[patent_app_type] => utility
[patent_app_number] => 12/713062
[patent_app_country] => US
[patent_app_date] => 2010-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 23
[patent_no_of_words] => 6520
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/030/08030122.pdf
[firstpage_image] =>[orig_patent_app_number] => 12713062
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/713062 | Method and apparatus for reduction of non-adaptive signals in photo-EMF sensors | Feb 24, 2010 | Issued |
Array
(
[id] => 9649165
[patent_doc_number] => 08803182
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-12
[patent_title] => 'Light emitting device comprising protective element and base'
[patent_app_type] => utility
[patent_app_number] => 12/711041
[patent_app_country] => US
[patent_app_date] => 2010-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 6449
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12711041
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711041 | Light emitting device comprising protective element and base | Feb 22, 2010 | Issued |
Array
(
[id] => 8436003
[patent_doc_number] => 08283774
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-09
[patent_title] => 'Chip on film type semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 12/710804
[patent_app_country] => US
[patent_app_date] => 2010-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2400
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12710804
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/710804 | Chip on film type semiconductor package | Feb 22, 2010 | Issued |
Array
(
[id] => 6410907
[patent_doc_number] => 20100149723
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-17
[patent_title] => 'METHOD AND STRUCTURE FOR CREATION OF A METAL INSULATOR METAL CAPACITOR'
[patent_app_type] => utility
[patent_app_number] => 12/706834
[patent_app_country] => US
[patent_app_date] => 2010-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1888
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0149/20100149723.pdf
[firstpage_image] =>[orig_patent_app_number] => 12706834
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/706834 | Method and structure for creation of a metal insulator metal capacitor | Feb 16, 2010 | Issued |
Array
(
[id] => 6583251
[patent_doc_number] => 20100129977
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-27
[patent_title] => 'INTEGRATED CIRCUIT WITH CAPACITOR AND METHOD FOR THE PRODUCTION THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/696811
[patent_app_country] => US
[patent_app_date] => 2010-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5300
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0129/20100129977.pdf
[firstpage_image] =>[orig_patent_app_number] => 12696811
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/696811 | Integrated circuit with capacitor and method for the production thereof | Jan 28, 2010 | Issued |
Array
(
[id] => 6559905
[patent_doc_number] => 20100128153
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-27
[patent_title] => 'SOLID-STATE IMAGING DEVICE AND DRIVING METHOD THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 12/694336
[patent_app_country] => US
[patent_app_date] => 2010-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6825
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20100128153.pdf
[firstpage_image] =>[orig_patent_app_number] => 12694336
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/694336 | Solid-state imaging device and driving method therefor | Jan 26, 2010 | Issued |
Array
(
[id] => 6256301
[patent_doc_number] => 20100295163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-11-25
[patent_title] => 'STACKED SEMICONDUCTOR PACKAGE ASSEMBLY'
[patent_app_type] => utility
[patent_app_number] => 12/693502
[patent_app_country] => US
[patent_app_date] => 2010-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2164
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0295/20100295163.pdf
[firstpage_image] =>[orig_patent_app_number] => 12693502
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/693502 | STACKED SEMICONDUCTOR PACKAGE ASSEMBLY | Jan 25, 2010 | Abandoned |
Array
(
[id] => 8538246
[patent_doc_number] => 08313967
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-11-20
[patent_title] => 'Cubic phase, nitrogen-based compound semiconductor films epitaxially grown on a grooved Si <001> substrate'
[patent_app_type] => utility
[patent_app_number] => 12/691463
[patent_app_country] => US
[patent_app_date] => 2010-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 26
[patent_no_of_words] => 6043
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12691463
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/691463 | Cubic phase, nitrogen-based compound semiconductor films epitaxially grown on a grooved Si <001> substrate | Jan 20, 2010 | Issued |
Array
(
[id] => 6169629
[patent_doc_number] => 20110175055
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-21
[patent_title] => 'SOLID STATE LIGHTING DEVICE ON A CONDUCTIVE SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 12/691269
[patent_app_country] => US
[patent_app_date] => 2010-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 4823
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0175/20110175055.pdf
[firstpage_image] =>[orig_patent_app_number] => 12691269
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/691269 | Solid state lighting device on a conductive substrate | Jan 20, 2010 | Issued |
Array
(
[id] => 6169985
[patent_doc_number] => 20110175190
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-21
[patent_title] => 'DEEP WELL STRUCTURES WITH SINGLE DEPTH SHALLOW TRENCH ISOLATION REGIONS'
[patent_app_type] => utility
[patent_app_number] => 12/691196
[patent_app_country] => US
[patent_app_date] => 2010-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3352
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0175/20110175190.pdf
[firstpage_image] =>[orig_patent_app_number] => 12691196
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/691196 | Deep well structures with single depth shallow trench isolation regions | Jan 20, 2010 | Issued |
Array
(
[id] => 8446715
[patent_doc_number] => 08288768
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-16
[patent_title] => 'Thin film transistor, method of manufacturing the same, and flat panel display device having the same'
[patent_app_type] => utility
[patent_app_number] => 12/690149
[patent_app_country] => US
[patent_app_date] => 2010-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3961
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12690149
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/690149 | Thin film transistor, method of manufacturing the same, and flat panel display device having the same | Jan 19, 2010 | Issued |
Array
(
[id] => 6169982
[patent_doc_number] => 20110175188
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-21
[patent_title] => 'Wavelength Sensitive Sensor Photodiodes'
[patent_app_type] => utility
[patent_app_number] => 12/689349
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5006
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0175/20110175188.pdf
[firstpage_image] =>[orig_patent_app_number] => 12689349
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/689349 | Wavelength sensitive sensor photodiodes | Jan 18, 2010 | Issued |
Array
(
[id] => 8592515
[patent_doc_number] => 08350392
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-08
[patent_title] => 'Semiconductor device having recess with varying width and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/689680
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 19
[patent_no_of_words] => 5116
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12689680
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/689680 | Semiconductor device having recess with varying width and method of manufacturing the same | Jan 18, 2010 | Issued |
Array
(
[id] => 5963172
[patent_doc_number] => 20110147797
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'STRUCTURE OF A pHEMT TRANSISTOR CAPABLE OF NANOSECOND SWITCHING'
[patent_app_type] => utility
[patent_app_number] => 12/643088
[patent_app_country] => US
[patent_app_date] => 2009-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4211
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0147/20110147797.pdf
[firstpage_image] =>[orig_patent_app_number] => 12643088
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/643088 | Structure of a pHEMT transistor capable of nanosecond switching | Dec 20, 2009 | Issued |
Array
(
[id] => 5963166
[patent_doc_number] => 20110147791
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'GROWTH OF COINCIDENT SITE LATTICE MATCHED SEMICONDUCTOR LAYERS AND DEVICES ON CRYSTALLINE SUBSTRATES'
[patent_app_type] => utility
[patent_app_number] => 12/643127
[patent_app_country] => US
[patent_app_date] => 2009-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9631
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0147/20110147791.pdf
[firstpage_image] =>[orig_patent_app_number] => 12643127
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/643127 | Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates | Dec 20, 2009 | Issued |
Array
(
[id] => 8398955
[patent_doc_number] => 08269336
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-09-18
[patent_title] => 'Semiconductor chip assembly with post/base heat spreader and signal post'
[patent_app_type] => utility
[patent_app_number] => 12/642795
[patent_app_country] => US
[patent_app_date] => 2009-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 40
[patent_no_of_words] => 21310
[patent_no_of_claims] => 60
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12642795
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/642795 | Semiconductor chip assembly with post/base heat spreader and signal post | Dec 18, 2009 | Issued |