Search

Jon D. Epperson

Examiner (ID: 17159)

Most Active Art Unit
1639
Art Unit(s)
6211, 1627, 1639
Total Applications
310
Issued Applications
79
Pending Applications
46
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6475040 [patent_doc_number] => 20100008172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-14 [patent_title] => 'DYNAMIC TYPE SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/502692 [patent_app_country] => US [patent_app_date] => 2009-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8639 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20100008172.pdf [firstpage_image] =>[orig_patent_app_number] => 12502692 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502692
Dynamic type semiconductor memory device and operation method of the same Jul 13, 2009 Issued
Array ( [id] => 4492461 [patent_doc_number] => 07885130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-08 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/502402 [patent_app_country] => US [patent_app_date] => 2009-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4618 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/885/07885130.pdf [firstpage_image] =>[orig_patent_app_number] => 12502402 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502402
Semiconductor integrated circuit Jul 13, 2009 Issued
Array ( [id] => 5991814 [patent_doc_number] => 20110013467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'System and Method for Reading Memory' [patent_app_type] => utility [patent_app_number] => 12/502682 [patent_app_country] => US [patent_app_date] => 2009-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5757 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20110013467.pdf [firstpage_image] =>[orig_patent_app_number] => 12502682 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502682
System and Method for Reading Memory Jul 13, 2009 Abandoned
Array ( [id] => 6368254 [patent_doc_number] => 20100080066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'MEMORY, MEMORY OPERATING METHOD, AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/502592 [patent_app_country] => US [patent_app_date] => 2009-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10131 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20100080066.pdf [firstpage_image] =>[orig_patent_app_number] => 12502592 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502592
Memory, memory operating method, and memory system Jul 13, 2009 Issued
Array ( [id] => 4458946 [patent_doc_number] => 07894234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'F-SRAM before package solid data write' [patent_app_type] => utility [patent_app_number] => 12/502860 [patent_app_country] => US [patent_app_date] => 2009-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/894/07894234.pdf [firstpage_image] =>[orig_patent_app_number] => 12502860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502860
F-SRAM before package solid data write Jul 13, 2009 Issued
Array ( [id] => 4452848 [patent_doc_number] => 07965538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-21 [patent_title] => 'Active protection device for resistive random access memory (RRAM) formation' [patent_app_type] => utility [patent_app_number] => 12/502224 [patent_app_country] => US [patent_app_date] => 2009-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3010 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/965/07965538.pdf [firstpage_image] =>[orig_patent_app_number] => 12502224 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502224
Active protection device for resistive random access memory (RRAM) formation Jul 12, 2009 Issued
Array ( [id] => 6133080 [patent_doc_number] => 20110007551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'Non-Volatile Memory Cell with Non-Ohmic Selection Layer' [patent_app_type] => utility [patent_app_number] => 12/502222 [patent_app_country] => US [patent_app_date] => 2009-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3887 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20110007551.pdf [firstpage_image] =>[orig_patent_app_number] => 12502222 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502222
Non-volatile memory cell with non-ohmic selection layer Jul 12, 2009 Issued
Array ( [id] => 4582442 [patent_doc_number] => 07830711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Memory system and data writing method' [patent_app_type] => utility [patent_app_number] => 12/483275 [patent_app_country] => US [patent_app_date] => 2009-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 9027 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/830/07830711.pdf [firstpage_image] =>[orig_patent_app_number] => 12483275 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/483275
Memory system and data writing method Jun 11, 2009 Issued
Array ( [id] => 5402699 [patent_doc_number] => 20090238013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/474887 [patent_app_country] => US [patent_app_date] => 2009-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 32204 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20090238013.pdf [firstpage_image] =>[orig_patent_app_number] => 12474887 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/474887
Semiconductor device May 28, 2009 Issued
Array ( [id] => 5401289 [patent_doc_number] => 20090236602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'Integrated Circuit, Semiconductor Device Comprising the Same, Electronic Device Having the Same, and Driving Method of the Same' [patent_app_type] => utility [patent_app_number] => 12/474766 [patent_app_country] => US [patent_app_date] => 2009-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16956 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20090236602.pdf [firstpage_image] =>[orig_patent_app_number] => 12474766 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/474766
Integrated circuit, semiconductor device comprising the same, electronic device having the same, and driving method of the same May 28, 2009 Issued
Array ( [id] => 4581789 [patent_doc_number] => 07859908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Iterative memory cell charging based on reference cell value' [patent_app_type] => utility [patent_app_number] => 12/469604 [patent_app_country] => US [patent_app_date] => 2009-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 18086 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859908.pdf [firstpage_image] =>[orig_patent_app_number] => 12469604 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/469604
Iterative memory cell charging based on reference cell value May 19, 2009 Issued
Array ( [id] => 5556961 [patent_doc_number] => 20090268538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'Current sensing circuit and semiconductor memory device including the same' [patent_app_type] => utility [patent_app_number] => 12/385958 [patent_app_country] => US [patent_app_date] => 2009-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8597 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20090268538.pdf [firstpage_image] =>[orig_patent_app_number] => 12385958 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/385958
Current sensing circuit and semiconductor memory device including the same Apr 23, 2009 Issued
Array ( [id] => 6549853 [patent_doc_number] => 20100271885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'Reduced complexity array line drivers for 3D matrix arrays' [patent_app_type] => utility [patent_app_number] => 12/385964 [patent_app_country] => US [patent_app_date] => 2009-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 15487 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20100271885.pdf [firstpage_image] =>[orig_patent_app_number] => 12385964 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/385964
Reduced complexity array line drivers for 3D matrix arrays Apr 23, 2009 Issued
Array ( [id] => 4522329 [patent_doc_number] => 07911870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Fuse data read circuit having control circuit between fuse and current mirror circuit' [patent_app_type] => utility [patent_app_number] => 12/385844 [patent_app_country] => US [patent_app_date] => 2009-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4827 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911870.pdf [firstpage_image] =>[orig_patent_app_number] => 12385844 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/385844
Fuse data read circuit having control circuit between fuse and current mirror circuit Apr 20, 2009 Issued
Array ( [id] => 8540446 [patent_doc_number] => 08316173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-20 [patent_title] => 'System, method, and computer program product for analyzing monitor data information from a plurality of memory devices having finite endurance and/or retention' [patent_app_type] => utility [patent_app_number] => 12/420628 [patent_app_country] => US [patent_app_date] => 2009-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7842 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12420628 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/420628
System, method, and computer program product for analyzing monitor data information from a plurality of memory devices having finite endurance and/or retention Apr 7, 2009 Issued
Array ( [id] => 8376698 [patent_doc_number] => 08259498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Continuous address space in non-volatile-memories (NVM) using efficient management methods for array deficiencies' [patent_app_type] => utility [patent_app_number] => 12/419837 [patent_app_country] => US [patent_app_date] => 2009-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 14880 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12419837 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/419837
Continuous address space in non-volatile-memories (NVM) using efficient management methods for array deficiencies Apr 6, 2009 Issued
Array ( [id] => 6376132 [patent_doc_number] => 20100081395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'DRAM HAVING STACKED CAPACITORS OF DIFFERENT CAPACITANCES' [patent_app_type] => utility [patent_app_number] => 12/416722 [patent_app_country] => US [patent_app_date] => 2009-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7898 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20100081395.pdf [firstpage_image] =>[orig_patent_app_number] => 12416722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/416722
DRAM having stacked capacitors of different capacitances Mar 31, 2009 Issued
Array ( [id] => 7520030 [patent_doc_number] => 07974135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-05 [patent_title] => 'Non-volatile semiconductor memory device and erasing method thereof' [patent_app_type] => utility [patent_app_number] => 12/409676 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 5040 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/974/07974135.pdf [firstpage_image] =>[orig_patent_app_number] => 12409676 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409676
Non-volatile semiconductor memory device and erasing method thereof Mar 23, 2009 Issued
Array ( [id] => 4544412 [patent_doc_number] => 07889559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-15 [patent_title] => 'Circuit for generating a voltage and a non-volatile memory device having the same' [patent_app_type] => utility [patent_app_number] => 12/410414 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4750 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/889/07889559.pdf [firstpage_image] =>[orig_patent_app_number] => 12410414 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/410414
Circuit for generating a voltage and a non-volatile memory device having the same Mar 23, 2009 Issued
Array ( [id] => 4438675 [patent_doc_number] => 07898840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-01 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/409666 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 7009 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/898/07898840.pdf [firstpage_image] =>[orig_patent_app_number] => 12409666 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409666
Nonvolatile semiconductor memory device Mar 23, 2009 Issued
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