Search

Jon D. Epperson

Examiner (ID: 17159)

Most Active Art Unit
1639
Art Unit(s)
6211, 1627, 1639
Total Applications
310
Issued Applications
79
Pending Applications
46
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16881243 [patent_doc_number] => 11031400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Integrated memory comprising secondary access devices between digit lines and primary access devices [patent_app_type] => utility [patent_app_number] => 16/514693 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5055 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514693 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514693
Integrated memory comprising secondary access devices between digit lines and primary access devices Jul 16, 2019 Issued
Array ( [id] => 16356225 [patent_doc_number] => 10796742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Charge sharing between memory cell plates [patent_app_type] => utility [patent_app_number] => 16/513036 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 16079 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513036 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513036
Charge sharing between memory cell plates Jul 15, 2019 Issued
Array ( [id] => 16536296 [patent_doc_number] => 10878909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Semiconductor device, memory system, and operating method of semiconductor device [patent_app_type] => utility [patent_app_number] => 16/511559 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 8453 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16511559 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/511559
Semiconductor device, memory system, and operating method of semiconductor device Jul 14, 2019 Issued
Array ( [id] => 16578539 [patent_doc_number] => 20210012940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => MAGNETIC MEMORY STRUCTURES USING ELECTRIC-FIELD CONTROLLED INTERLAYER EXCHANGE COUPLING (IEC) FOR MAGNETIZATION SWITCHING [patent_app_type] => utility [patent_app_number] => 16/510343 [patent_app_country] => US [patent_app_date] => 2019-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16510343 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/510343
Magnetic memory structures using electric-field controlled interlayer exchange coupling (IEC) for magnetization switching Jul 11, 2019 Issued
Array ( [id] => 15369243 [patent_doc_number] => 20200020386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => LATCH CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/507805 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507805 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507805
Latch circuit formed from bit cell Jul 9, 2019 Issued
Array ( [id] => 15563873 [patent_doc_number] => 20200066348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/504023 [patent_app_country] => US [patent_app_date] => 2019-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16504023 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/504023
Memory system performing cache program and operating method thereof Jul 4, 2019 Issued
Array ( [id] => 15969055 [patent_doc_number] => 20200168279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/502221 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16502221 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/502221
Memory device and operating method of the memory device Jul 2, 2019 Issued
Array ( [id] => 16386235 [patent_doc_number] => 10811076 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-20 [patent_title] => Battery life based on inhibited memory refreshes [patent_app_type] => utility [patent_app_number] => 16/458023 [patent_app_country] => US [patent_app_date] => 2019-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10498 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458023 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458023
Battery life based on inhibited memory refreshes Jun 28, 2019 Issued
Array ( [id] => 15299551 [patent_doc_number] => 20190392911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => ANTIFUSE MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/453943 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16453943 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/453943
Antifuse memory device and operation method thereof Jun 25, 2019 Issued
Array ( [id] => 16528485 [patent_doc_number] => 20200402566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => APPARATUSES AND METHODS FOR CONTROLLING WORD DRIVERS [patent_app_type] => utility [patent_app_number] => 16/450737 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450737 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450737
Apparatuses and methods for controlling word drivers Jun 23, 2019 Issued
Array ( [id] => 16233684 [patent_doc_number] => 10741244 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-11 [patent_title] => Memory and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/448025 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5845 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448025 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/448025
Memory and operating method thereof Jun 20, 2019 Issued
Array ( [id] => 16279906 [patent_doc_number] => 10762942 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-01 [patent_title] => Magneto-resistive random access memory cell with spin-dependent diffusion and state transfer [patent_app_type] => utility [patent_app_number] => 16/443729 [patent_app_country] => US [patent_app_date] => 2019-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16443729 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/443729
Magneto-resistive random access memory cell with spin-dependent diffusion and state transfer Jun 16, 2019 Issued
Array ( [id] => 16409778 [patent_doc_number] => 10818341 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-27 [patent_title] => Sub-word line driver circuit with variable-thickness gate dielectric layer, semiconductor memory device having the same and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/435167 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7117 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16435167 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/435167
Sub-word line driver circuit with variable-thickness gate dielectric layer, semiconductor memory device having the same and method of forming the same Jun 6, 2019 Issued
Array ( [id] => 16233690 [patent_doc_number] => 10741250 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-11 [patent_title] => Non-volatile memory device and driving method thereof [patent_app_type] => utility [patent_app_number] => 16/431913 [patent_app_country] => US [patent_app_date] => 2019-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16431913 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/431913
Non-volatile memory device and driving method thereof Jun 4, 2019 Issued
Array ( [id] => 16485460 [patent_doc_number] => 20200379063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => MAGNETIC ATTACK DETECTION IN A MAGNETIC RANDOM ACCESS MEMORY (MRAM) [patent_app_type] => utility [patent_app_number] => 16/427478 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427478 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/427478
Magnetic attack detection in a magnetic random access memory (MRAM) May 30, 2019 Issued
Array ( [id] => 15969039 [patent_doc_number] => 20200168271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD OF SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/421855 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421855 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/421855
Semiconductor memory device for supporting operation of neural network and operating method of semiconductor memory device May 23, 2019 Issued
Array ( [id] => 15351093 [patent_doc_number] => 20200013438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => RANDOM BIT CELL WITH NON-VOLATILE STORAGE ELEMENT [patent_app_type] => utility [patent_app_number] => 16/393899 [patent_app_country] => US [patent_app_date] => 2019-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16393899 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/393899
Random bit cell using an initial state of a latch to generate a random bit Apr 23, 2019 Issued
Array ( [id] => 15029883 [patent_doc_number] => 20190325946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => MEMORY CELL ARRAY AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 16/383289 [patent_app_country] => US [patent_app_date] => 2019-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383289 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383289
Memory circuit and method of operating same Apr 11, 2019 Issued
Array ( [id] => 16409767 [patent_doc_number] => 10818328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-27 [patent_title] => Nonvolatile memory device, operation method of the nonvolatile memory device, and operation method of memory controller controlling the nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 16/372223 [patent_app_country] => US [patent_app_date] => 2019-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 13032 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16372223 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/372223
Nonvolatile memory device, operation method of the nonvolatile memory device, and operation method of memory controller controlling the nonvolatile memory device Mar 31, 2019 Issued
Array ( [id] => 16021129 [patent_doc_number] => 20200185408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => NOVEL 3D NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/365725 [patent_app_country] => US [patent_app_date] => 2019-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16365725 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/365725
3D NAND memory device and method of forming the same Mar 26, 2019 Issued
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