Search

Jon D. Epperson

Examiner (ID: 17159)

Most Active Art Unit
1639
Art Unit(s)
6211, 1627, 1639
Total Applications
310
Issued Applications
79
Pending Applications
46
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5402705 [patent_doc_number] => 20090238019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'Bit line precharge circuit having precharge elements outside sense amplifier' [patent_app_type] => utility [patent_app_number] => 12/215800 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4728 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20090238019.pdf [firstpage_image] =>[orig_patent_app_number] => 12215800 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215800
Bit line precharge circuit having precharge elements outside sense amplifier Jun 29, 2008 Issued
Array ( [id] => 5321693 [patent_doc_number] => 20090059683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/216138 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20090059683.pdf [firstpage_image] =>[orig_patent_app_number] => 12216138 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/216138
Semiconductor memory device Jun 29, 2008 Issued
Array ( [id] => 4662281 [patent_doc_number] => 20080253188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'PROGRAMMING METHOD TO REDUCE GATE COUPLING INTERFERENCE FOR NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/142293 [patent_app_country] => US [patent_app_date] => 2008-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20080253188.pdf [firstpage_image] =>[orig_patent_app_number] => 12142293 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/142293
Programming method to reduce gate coupling interference for non-volatile memory Jun 18, 2008 Issued
Array ( [id] => 5366225 [patent_doc_number] => 20090303784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Asymetric threshold three terminal switching device' [patent_app_type] => utility [patent_app_number] => 12/157076 [patent_app_country] => US [patent_app_date] => 2008-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17473 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20090303784.pdf [firstpage_image] =>[orig_patent_app_number] => 12157076 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/157076
Asymmetric-threshold three-terminal switching device Jun 5, 2008 Issued
Array ( [id] => 4717333 [patent_doc_number] => 20080239855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'Semiconductor memory device performing self refresh operation' [patent_app_type] => utility [patent_app_number] => 12/156696 [patent_app_country] => US [patent_app_date] => 2008-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2742 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20080239855.pdf [firstpage_image] =>[orig_patent_app_number] => 12156696 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/156696
Semiconductor memory device performing self refresh operation Jun 2, 2008 Issued
Array ( [id] => 4790741 [patent_doc_number] => 20080291714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/119324 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10003 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20080291714.pdf [firstpage_image] =>[orig_patent_app_number] => 12119324 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119324
Semiconductor memory device May 11, 2008 Issued
Array ( [id] => 5289243 [patent_doc_number] => 20090021973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/119341 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9998 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20090021973.pdf [firstpage_image] =>[orig_patent_app_number] => 12119341 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119341
Semiconductor memory device May 11, 2008 Issued
Array ( [id] => 4581529 [patent_doc_number] => 07859878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Design structure for implementing matrix-based search capability in content addressable memory devices' [patent_app_type] => utility [patent_app_number] => 12/110375 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3993 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859878.pdf [firstpage_image] =>[orig_patent_app_number] => 12110375 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/110375
Design structure for implementing matrix-based search capability in content addressable memory devices Apr 27, 2008 Issued
Array ( [id] => 4858106 [patent_doc_number] => 20080266956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'FLASH MEMORY DEVICE AND METHOD OF CONTROLLING FLASH MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/109466 [patent_app_country] => US [patent_app_date] => 2008-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6122 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20080266956.pdf [firstpage_image] =>[orig_patent_app_number] => 12109466 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109466
Flash memory device and method of controlling flash memory device Apr 24, 2008 Issued
Array ( [id] => 170839 [patent_doc_number] => 07668003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-23 [patent_title] => 'Dynamic random access memory circuit, design structure and method' [patent_app_type] => utility [patent_app_number] => 12/108548 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7618 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/668/07668003.pdf [firstpage_image] =>[orig_patent_app_number] => 12108548 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/108548
Dynamic random access memory circuit, design structure and method Apr 23, 2008 Issued
Array ( [id] => 4858118 [patent_doc_number] => 20080266968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'CHARGE PUMP CIRCUIT, SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR DRIVING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/108948 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10300 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20080266968.pdf [firstpage_image] =>[orig_patent_app_number] => 12108948 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/108948
Charge pump circuit, semiconductor memory device, and method for driving the same Apr 23, 2008 Issued
Array ( [id] => 5556963 [patent_doc_number] => 20090268540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'Systems and Methods for Dynamic Power Savings in Electronic Memory Operation' [patent_app_type] => utility [patent_app_number] => 12/108608 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3358 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20090268540.pdf [firstpage_image] =>[orig_patent_app_number] => 12108608 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/108608
Systems and methods for dynamic power savings in electronic memory operation Apr 23, 2008 Issued
Array ( [id] => 4871935 [patent_doc_number] => 20080198669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'METHOD OF OPERATING NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/107774 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8669 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20080198669.pdf [firstpage_image] =>[orig_patent_app_number] => 12107774 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107774
METHOD OF OPERATING NON-VOLATILE MEMORY Apr 22, 2008 Abandoned
12/108196 FLOATING-GATE BASED PROGRAMMABLE CMOS REFERENCE Apr 22, 2008 Abandoned
Array ( [id] => 134052 [patent_doc_number] => 07701763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-20 [patent_title] => 'Leakage compensation during program and read operations' [patent_app_type] => utility [patent_app_number] => 12/108148 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11704 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/701/07701763.pdf [firstpage_image] =>[orig_patent_app_number] => 12108148 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/108148
Leakage compensation during program and read operations Apr 22, 2008 Issued
Array ( [id] => 5493836 [patent_doc_number] => 20090261864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-22 [patent_title] => 'CURRENT MODE DATA SENSING AND PROPAGATION USING VOLTAGE AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 12/107564 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3977 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20090261864.pdf [firstpage_image] =>[orig_patent_app_number] => 12107564 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107564
Current mode data sensing and propagation using voltage amplifier Apr 21, 2008 Issued
Array ( [id] => 5440346 [patent_doc_number] => 20090091985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'INPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND CONTROL METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/107710 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3884 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20090091985.pdf [firstpage_image] =>[orig_patent_app_number] => 12107710 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107710
Input circuit of semiconductor memory apparatus and control method of the same Apr 21, 2008 Issued
Array ( [id] => 5494544 [patent_doc_number] => 20090262572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-22 [patent_title] => 'MULTILAYER STORAGE CLASS MEMORY USING EXTERNALLY HEATED PHASE CHANGE MATERIAL' [patent_app_type] => utility [patent_app_number] => 12/107338 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7545 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20090262572.pdf [firstpage_image] =>[orig_patent_app_number] => 12107338 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107338
Multilayer storage class memory using externally heated phase change material Apr 21, 2008 Issued
Array ( [id] => 4858101 [patent_doc_number] => 20080266951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'NON-VOLATILE MEMORY DEVICE AND PROGRAM METHOD' [patent_app_type] => utility [patent_app_number] => 12/106472 [patent_app_country] => US [patent_app_date] => 2008-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4397 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20080266951.pdf [firstpage_image] =>[orig_patent_app_number] => 12106472 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/106472
Non-volatile memory device and program method Apr 20, 2008 Issued
Array ( [id] => 5451185 [patent_doc_number] => 20090067221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'HIGH DENSITY 45NM SRAM USING SMALL-SIGNAL NON-STROBED REGENERATIVE SENSING' [patent_app_type] => utility [patent_app_number] => 12/105410 [patent_app_country] => US [patent_app_date] => 2008-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20090067221.pdf [firstpage_image] =>[orig_patent_app_number] => 12105410 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/105410
High density 45 nm SRAM using small-signal non-strobed regenerative sensing Apr 17, 2008 Issued
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