Search

Jon D. Epperson

Examiner (ID: 17159)

Most Active Art Unit
1639
Art Unit(s)
6211, 1627, 1639
Total Applications
310
Issued Applications
79
Pending Applications
46
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1026566 [patent_doc_number] => 06885579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Magnetic random access memory including a cell array having a magneto-resistance element' [patent_app_type] => utility [patent_app_number] => 10/609906 [patent_app_country] => US [patent_app_date] => 2003-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 22158 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885579.pdf [firstpage_image] =>[orig_patent_app_number] => 10609906 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/609906
Magnetic random access memory including a cell array having a magneto-resistance element Jun 30, 2003 Issued
Array ( [id] => 1091259 [patent_doc_number] => 06829186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => B2 [patent_app_number] => 10/606957 [patent_app_country] => US [patent_app_date] => 2003-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 34 [patent_no_of_words] => 11843 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/829/06829186.pdf [firstpage_image] =>[orig_patent_app_number] => 10606957 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/606957
Semiconductor integrated circuit Jun 26, 2003 Issued
Array ( [id] => 7087702 [patent_doc_number] => 20050007814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Multiple buffer memory interface' [patent_app_type] => utility [patent_app_number] => 10/609904 [patent_app_country] => US [patent_app_date] => 2003-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4726 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20050007814.pdf [firstpage_image] =>[orig_patent_app_number] => 10609904 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/609904
Multiple buffer memory interface Jun 26, 2003 Issued
Array ( [id] => 7415666 [patent_doc_number] => 20040264279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'HIGH PERFORMANCE GAIN CELL ARCHITECTURE' [patent_app_type] => new [patent_app_number] => 10/604109 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5823 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20040264279.pdf [firstpage_image] =>[orig_patent_app_number] => 10604109 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/604109
High performance gain cell architecture Jun 25, 2003 Issued
Array ( [id] => 6824450 [patent_doc_number] => 20030235072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Magnetic random access memory (MRAM) for spontaneous hall effect and method of writing and reading data using the MRAM' [patent_app_type] => new [patent_app_number] => 10/465602 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4483 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20030235072.pdf [firstpage_image] =>[orig_patent_app_number] => 10465602 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/465602
Magnetic random access memory (MRAM) for spontaneous hall effect and method of writing and reading data using the MRAM Jun 19, 2003 Issued
Array ( [id] => 7293456 [patent_doc_number] => 20040213031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Non-volatile semiconductor memory device and electric device with the same' [patent_app_type] => new [patent_app_number] => 10/601006 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10075 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20040213031.pdf [firstpage_image] =>[orig_patent_app_number] => 10601006 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/601006
Non-volatile semiconductor memory device and electric device with the same Jun 19, 2003 Issued
Array ( [id] => 7386191 [patent_doc_number] => 20040037128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'Circuit configuration for driving a programmable link' [patent_app_type] => new [patent_app_number] => 10/600408 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4561 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20040037128.pdf [firstpage_image] =>[orig_patent_app_number] => 10600408 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/600408
Circuit configuration for driving a programmable link Jun 19, 2003 Issued
Array ( [id] => 1051673 [patent_doc_number] => 06862221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-01 [patent_title] => 'Memory device having a thin top dielectric and method of erasing same' [patent_app_type] => utility [patent_app_number] => 10/459102 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4915 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862221.pdf [firstpage_image] =>[orig_patent_app_number] => 10459102 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459102
Memory device having a thin top dielectric and method of erasing same Jun 10, 2003 Issued
Array ( [id] => 6677673 [patent_doc_number] => 20030227813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Semiconductor apparatus which prevents generating noise and being influenced by noise' [patent_app_type] => new [patent_app_number] => 10/454404 [patent_app_country] => US [patent_app_date] => 2003-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9869 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20030227813.pdf [firstpage_image] =>[orig_patent_app_number] => 10454404 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/454404
Semiconductor apparatus which prevents generating noise and being influenced by noise Jun 3, 2003 Issued
Array ( [id] => 7425885 [patent_doc_number] => 20040001384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-01 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/448003 [patent_app_country] => US [patent_app_date] => 2003-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7408 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20040001384.pdf [firstpage_image] =>[orig_patent_app_number] => 10448003 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/448003
Semiconductor device May 29, 2003 Issued
Array ( [id] => 1057926 [patent_doc_number] => 06856540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'High density semiconductor memory cell and memory array using a single transistor' [patent_app_type] => utility [patent_app_number] => 10/448505 [patent_app_country] => US [patent_app_date] => 2003-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6212 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/856/06856540.pdf [firstpage_image] =>[orig_patent_app_number] => 10448505 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/448505
High density semiconductor memory cell and memory array using a single transistor May 29, 2003 Issued
Array ( [id] => 7678298 [patent_doc_number] => 20030196038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-16 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 10/446802 [patent_app_country] => US [patent_app_date] => 2003-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6288 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20030196038.pdf [firstpage_image] =>[orig_patent_app_number] => 10446802 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/446802
Semiconductor integrated circuit May 28, 2003 Abandoned
Array ( [id] => 7611872 [patent_doc_number] => 06903967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Memory with charge storage locations and adjacent gate structures' [patent_app_type] => utility [patent_app_number] => 10/443908 [patent_app_country] => US [patent_app_date] => 2003-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6535 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903967.pdf [firstpage_image] =>[orig_patent_app_number] => 10443908 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/443908
Memory with charge storage locations and adjacent gate structures May 21, 2003 Issued
Array ( [id] => 1045380 [patent_doc_number] => 06868014 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'Memory device with reduced operating voltage having dielectric stack' [patent_app_type] => utility [patent_app_number] => 10/430604 [patent_app_country] => US [patent_app_date] => 2003-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 4812 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/868/06868014.pdf [firstpage_image] =>[orig_patent_app_number] => 10430604 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/430604
Memory device with reduced operating voltage having dielectric stack May 5, 2003 Issued
Array ( [id] => 964977 [patent_doc_number] => 06950366 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-27 [patent_title] => 'Method and system for providing a low power memory array' [patent_app_type] => utility [patent_app_number] => 10/426761 [patent_app_country] => US [patent_app_date] => 2003-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5782 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/950/06950366.pdf [firstpage_image] =>[orig_patent_app_number] => 10426761 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/426761
Method and system for providing a low power memory array Apr 29, 2003 Issued
Array ( [id] => 741525 [patent_doc_number] => 07035132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-25 [patent_title] => 'Memory architecture for increased speed and reduced power consumption' [patent_app_type] => utility [patent_app_number] => 10/426004 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1394 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/035/07035132.pdf [firstpage_image] =>[orig_patent_app_number] => 10426004 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/426004
Memory architecture for increased speed and reduced power consumption Apr 28, 2003 Issued
Array ( [id] => 1042098 [patent_doc_number] => 06870752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'High density mask ROM having flat-type bank select' [patent_app_type] => utility [patent_app_number] => 10/420949 [patent_app_country] => US [patent_app_date] => 2003-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4218 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/870/06870752.pdf [firstpage_image] =>[orig_patent_app_number] => 10420949 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/420949
High density mask ROM having flat-type bank select Apr 22, 2003 Issued
Array ( [id] => 360671 [patent_doc_number] => 07486548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Magnetic memory device' [patent_app_type] => utility [patent_app_number] => 10/553223 [patent_app_country] => US [patent_app_date] => 2003-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3958 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/486/07486548.pdf [firstpage_image] =>[orig_patent_app_number] => 10553223 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/553223
Magnetic memory device Apr 15, 2003 Issued
Array ( [id] => 916525 [patent_doc_number] => 07327597 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-02-05 [patent_title] => 'Static random access memory architecture' [patent_app_type] => utility [patent_app_number] => 10/412566 [patent_app_country] => US [patent_app_date] => 2003-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5159 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/327/07327597.pdf [firstpage_image] =>[orig_patent_app_number] => 10412566 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/412566
Static random access memory architecture Apr 10, 2003 Issued
Array ( [id] => 1019841 [patent_doc_number] => 06891764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Apparatus and method to read a nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 10/411702 [patent_app_country] => US [patent_app_date] => 2003-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12060 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891764.pdf [firstpage_image] =>[orig_patent_app_number] => 10411702 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/411702
Apparatus and method to read a nonvolatile memory Apr 10, 2003 Issued
Menu