Search

Jon D. Epperson

Examiner (ID: 17159)

Most Active Art Unit
1639
Art Unit(s)
6211, 1627, 1639
Total Applications
310
Issued Applications
79
Pending Applications
46
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7195625 [patent_doc_number] => 20040085845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Semiconductor device and semiconductor memory device provided with internal current setting adjustment circuit' [patent_app_type] => new [patent_app_number] => 10/410206 [patent_app_country] => US [patent_app_date] => 2003-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 21113 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20040085845.pdf [firstpage_image] =>[orig_patent_app_number] => 10410206 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/410206
Semiconductor device and semiconductor memory device provided with internal current setting adjustment circuit Apr 9, 2003 Abandoned
Array ( [id] => 1131018 [patent_doc_number] => 06791891 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-14 [patent_title] => 'Method of testing the thin oxide of a semiconductor memory cell that uses breakdown voltage' [patent_app_type] => B1 [patent_app_number] => 10/406406 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9329 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791891.pdf [firstpage_image] =>[orig_patent_app_number] => 10406406 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/406406
Method of testing the thin oxide of a semiconductor memory cell that uses breakdown voltage Apr 1, 2003 Issued
Array ( [id] => 7338130 [patent_doc_number] => 20040190322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Circuit and method for reducing the effects of memory imprinting' [patent_app_type] => new [patent_app_number] => 10/402708 [patent_app_country] => US [patent_app_date] => 2003-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6700 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20040190322.pdf [firstpage_image] =>[orig_patent_app_number] => 10402708 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/402708
Circuit and method for reducing the effects of memory imprinting Mar 27, 2003 Abandoned
Array ( [id] => 6728894 [patent_doc_number] => 20030185084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Integrated circuit capable of easily applying address selection voltage' [patent_app_type] => new [patent_app_number] => 10/400614 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2423 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20030185084.pdf [firstpage_image] =>[orig_patent_app_number] => 10400614 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/400614
Integrated circuit capable of easily applying address selection voltage Mar 26, 2003 Abandoned
Array ( [id] => 7338170 [patent_doc_number] => 20040190340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Word-line voltage generator' [patent_app_type] => new [patent_app_number] => 10/397574 [patent_app_country] => US [patent_app_date] => 2003-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2841 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20040190340.pdf [firstpage_image] =>[orig_patent_app_number] => 10397574 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/397574
Word-line voltage generator Mar 25, 2003 Issued
Array ( [id] => 1194954 [patent_doc_number] => 06731564 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Method and system for power conservation in memory devices' [patent_app_type] => B1 [patent_app_number] => 10/391006 [patent_app_country] => US [patent_app_date] => 2003-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/731/06731564.pdf [firstpage_image] =>[orig_patent_app_number] => 10391006 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/391006
Method and system for power conservation in memory devices Mar 17, 2003 Issued
Array ( [id] => 6795692 [patent_doc_number] => 20030174565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Content addressable memory match line sensing techniques' [patent_app_type] => new [patent_app_number] => 10/389495 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2331 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174565.pdf [firstpage_image] =>[orig_patent_app_number] => 10389495 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/389495
Content addressable memory match line sensing techniques Mar 13, 2003 Issued
Array ( [id] => 7398344 [patent_doc_number] => 20040174748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Self boosting technique' [patent_app_type] => new [patent_app_number] => 10/379608 [patent_app_country] => US [patent_app_date] => 2003-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8928 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20040174748.pdf [firstpage_image] =>[orig_patent_app_number] => 10379608 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/379608
Source side self boosting technique for non-volatile memory Mar 4, 2003 Issued
Array ( [id] => 6833626 [patent_doc_number] => 20030161171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Adjustable charge pump circuit' [patent_app_type] => new [patent_app_number] => 10/382333 [patent_app_country] => US [patent_app_date] => 2003-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 19001 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20030161171.pdf [firstpage_image] =>[orig_patent_app_number] => 10382333 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/382333
Charge pump circuit adjustable in response to an external voltage source Mar 3, 2003 Issued
Array ( [id] => 6855092 [patent_doc_number] => 20030128593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Semiconductor storage apparatus' [patent_app_type] => new [patent_app_number] => 10/376848 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6307 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128593.pdf [firstpage_image] =>[orig_patent_app_number] => 10376848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/376848
Semiconductor storage apparatus Feb 27, 2003 Issued
Array ( [id] => 7616100 [patent_doc_number] => 06947344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-20 [patent_title] => 'Memory device and method of reading data from a memory cell' [patent_app_type] => utility [patent_app_number] => 10/376408 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 2965 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/947/06947344.pdf [firstpage_image] =>[orig_patent_app_number] => 10376408 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/376408
Memory device and method of reading data from a memory cell Feb 27, 2003 Issued
Array ( [id] => 6795671 [patent_doc_number] => 20030174544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Data output driver of semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/375605 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3148 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174544.pdf [firstpage_image] =>[orig_patent_app_number] => 10375605 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/375605
Data output driver of semiconductor memory device Feb 26, 2003 Issued
Array ( [id] => 1194855 [patent_doc_number] => 06731526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'CAM cell array, TCAM cell, TCAM cell array, address search memory, and network address search apparatus' [patent_app_type] => B2 [patent_app_number] => 10/374103 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 13366 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/731/06731526.pdf [firstpage_image] =>[orig_patent_app_number] => 10374103 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374103
CAM cell array, TCAM cell, TCAM cell array, address search memory, and network address search apparatus Feb 26, 2003 Issued
Array ( [id] => 364875 [patent_doc_number] => 07483326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-27 [patent_title] => 'Apparatus and method for monitoring a state, in particular of a fuse' [patent_app_type] => utility [patent_app_number] => 10/374916 [patent_app_country] => US [patent_app_date] => 2003-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1754 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/483/07483326.pdf [firstpage_image] =>[orig_patent_app_number] => 10374916 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374916
Apparatus and method for monitoring a state, in particular of a fuse Feb 25, 2003 Issued
Array ( [id] => 1180177 [patent_doc_number] => 06751122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/371306 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7779 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751122.pdf [firstpage_image] =>[orig_patent_app_number] => 10371306 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/371306
Nonvolatile semiconductor memory device Feb 20, 2003 Issued
Array ( [id] => 1208719 [patent_doc_number] => 06717879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Semiconductor memory device requiring refresh operation' [patent_app_type] => B2 [patent_app_number] => 10/369506 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 19971 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717879.pdf [firstpage_image] =>[orig_patent_app_number] => 10369506 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/369506
Semiconductor memory device requiring refresh operation Feb 20, 2003 Issued
Array ( [id] => 6739112 [patent_doc_number] => 20030156481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-21 [patent_title] => 'Semiconductor memory device and control method' [patent_app_type] => new [patent_app_number] => 10/372604 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8712 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20030156481.pdf [firstpage_image] =>[orig_patent_app_number] => 10372604 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/372604
Semiconductor memory device and control method Feb 20, 2003 Issued
Array ( [id] => 1122880 [patent_doc_number] => 06798701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Semiconductor integrated circuit device having data input/output configuration variable' [patent_app_type] => B2 [patent_app_number] => 10/368604 [patent_app_country] => US [patent_app_date] => 2003-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 34 [patent_no_of_words] => 20443 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798701.pdf [firstpage_image] =>[orig_patent_app_number] => 10368604 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/368604
Semiconductor integrated circuit device having data input/output configuration variable Feb 19, 2003 Issued
Array ( [id] => 1099297 [patent_doc_number] => 06822907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-23 [patent_title] => 'Nonvolatile semiconductor memory device and data readout method for the same' [patent_app_type] => B2 [patent_app_number] => 10/366403 [patent_app_country] => US [patent_app_date] => 2003-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 8616 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822907.pdf [firstpage_image] =>[orig_patent_app_number] => 10366403 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/366403
Nonvolatile semiconductor memory device and data readout method for the same Feb 13, 2003 Issued
Array ( [id] => 1074595 [patent_doc_number] => 06839263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Memory array with continuous current path through multiple lines' [patent_app_type] => utility [patent_app_number] => 10/358706 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 9814 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/839/06839263.pdf [firstpage_image] =>[orig_patent_app_number] => 10358706 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358706
Memory array with continuous current path through multiple lines Feb 4, 2003 Issued
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