Search

Jonathan A. Bui

Examiner (ID: 5274, Phone: (571)270-7168 , Office: P/2448 )

Most Active Art Unit
2448
Art Unit(s)
2448, 2443
Total Applications
826
Issued Applications
677
Pending Applications
54
Abandoned Applications
113

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5096752 [patent_doc_number] => 20070118361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-24 [patent_title] => 'Window apparatus and method' [patent_app_type] => utility [patent_app_number] => 11/544894 [patent_app_country] => US [patent_app_date] => 2006-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4306 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20070118361.pdf [firstpage_image] =>[orig_patent_app_number] => 11544894 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/544894
Window apparatus and method Oct 5, 2006 Abandoned
Array ( [id] => 4829401 [patent_doc_number] => 20080126467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Technique for transposing nonsymmetric sparse matrices' [patent_app_type] => utility [patent_app_number] => 11/527356 [patent_app_country] => US [patent_app_date] => 2006-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4100 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20080126467.pdf [firstpage_image] =>[orig_patent_app_number] => 11527356 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/527356
Technique for transposing nonsymmetric sparse matrices Sep 25, 2006 Abandoned
Array ( [id] => 343384 [patent_doc_number] => 07503039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-10 [patent_title] => 'Preprocessor to improve the performance of message-passing-based parallel programs on virtualized multi-core processors' [patent_app_type] => utility [patent_app_number] => 11/463496 [patent_app_country] => US [patent_app_date] => 2006-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 12748 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 404 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/503/07503039.pdf [firstpage_image] =>[orig_patent_app_number] => 11463496 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/463496
Preprocessor to improve the performance of message-passing-based parallel programs on virtualized multi-core processors Aug 8, 2006 Issued
Array ( [id] => 4911177 [patent_doc_number] => 20080021944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'Method and apparatus for reducing jitter in output signals from a frequency synthesizer using a control word having a fractional bit' [patent_app_type] => utility [patent_app_number] => 11/489982 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2377 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20080021944.pdf [firstpage_image] =>[orig_patent_app_number] => 11489982 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/489982
Method and apparatus for reducing jitter in output signals from a frequency synthesizer using a control word having a fractional bit Jul 19, 2006 Abandoned
Array ( [id] => 5108495 [patent_doc_number] => 20070067373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Methods and apparatuses to provide mobile applications' [patent_app_type] => utility [patent_app_number] => 11/485572 [patent_app_country] => US [patent_app_date] => 2006-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 48258 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20070067373.pdf [firstpage_image] =>[orig_patent_app_number] => 11485572 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/485572
Methods and apparatuses to provide mobile applications Jul 10, 2006 Abandoned
Array ( [id] => 5052698 [patent_doc_number] => 20070033243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Microwave filter banks' [patent_app_type] => utility [patent_app_number] => 11/483599 [patent_app_country] => US [patent_app_date] => 2006-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5336 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20070033243.pdf [firstpage_image] =>[orig_patent_app_number] => 11483599 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/483599
Microwave filter banks Jul 10, 2006 Abandoned
Array ( [id] => 5200584 [patent_doc_number] => 20070299902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Sparse tree adder' [patent_app_type] => utility [patent_app_number] => 11/475704 [patent_app_country] => US [patent_app_date] => 2006-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1814 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20070299902.pdf [firstpage_image] =>[orig_patent_app_number] => 11475704 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/475704
Sparse tree adder Jun 25, 2006 Abandoned
Array ( [id] => 5886734 [patent_doc_number] => 20060274826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Binary rate multiplier configured to generate accurate coefficients' [patent_app_type] => utility [patent_app_number] => 11/444574 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4730 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20060274826.pdf [firstpage_image] =>[orig_patent_app_number] => 11444574 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/444574
Binary rate multiplier configured to generate accurate coefficients May 30, 2006 Abandoned
Array ( [id] => 4874664 [patent_doc_number] => 20080201398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'Determination of a Modular Inverse' [patent_app_type] => utility [patent_app_number] => 11/915081 [patent_app_country] => US [patent_app_date] => 2006-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2556 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20080201398.pdf [firstpage_image] =>[orig_patent_app_number] => 11915081 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/915081
Determination of a Modular Inverse May 18, 2006 Abandoned
Array ( [id] => 7690272 [patent_doc_number] => 20070233761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Crossbar arithmetic processor' [patent_app_type] => utility [patent_app_number] => 11/395232 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8995 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20070233761.pdf [firstpage_image] =>[orig_patent_app_number] => 11395232 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/395232
Crossbar arithmetic processor Apr 2, 2006 Abandoned
Array ( [id] => 4730014 [patent_doc_number] => 20080208941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'Interpolation Process Circuit' [patent_app_type] => utility [patent_app_number] => 11/915085 [patent_app_country] => US [patent_app_date] => 2006-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8216 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20080208941.pdf [firstpage_image] =>[orig_patent_app_number] => 11915085 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/915085
Interpolation Process Circuit Feb 7, 2006 Abandoned
Array ( [id] => 5161781 [patent_doc_number] => 20070174825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Apparatus and method for optimizing scalar code executed on a SIMD engine by alignment of SIMD slots' [patent_app_type] => utility [patent_app_number] => 11/339591 [patent_app_country] => US [patent_app_date] => 2006-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20070174825.pdf [firstpage_image] =>[orig_patent_app_number] => 11339591 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/339591
Apparatus and method for optimizing scalar code executed on a SIMD engine by alignment of SIMD slots Jan 24, 2006 Abandoned
Array ( [id] => 5651188 [patent_doc_number] => 20060136923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'System for distributed task execution' [patent_app_type] => utility [patent_app_number] => 11/317721 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15802 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20060136923.pdf [firstpage_image] =>[orig_patent_app_number] => 11317721 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317721
System for distributed task execution Dec 21, 2005 Abandoned
Array ( [id] => 5184609 [patent_doc_number] => 20070055963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'Compile target and compiler flag extraction in program analysis and transformation systems' [patent_app_type] => utility [patent_app_number] => 11/222099 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3347 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20070055963.pdf [firstpage_image] =>[orig_patent_app_number] => 11222099 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/222099
Compile target and compiler flag extraction in program analysis and transformation systems Sep 7, 2005 Abandoned
Array ( [id] => 7256301 [patent_doc_number] => 20050273765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Object-oriented creation breakpoints' [patent_app_type] => utility [patent_app_number] => 11/197895 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6497 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20050273765.pdf [firstpage_image] =>[orig_patent_app_number] => 11197895 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/197895
Object-oriented creation breakpoints Aug 4, 2005 Abandoned
Array ( [id] => 5644377 [patent_doc_number] => 20060282832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Calculating module runtimes on multiple platforms' [patent_app_type] => utility [patent_app_number] => 11/149997 [patent_app_country] => US [patent_app_date] => 2005-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4439 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0282/20060282832.pdf [firstpage_image] =>[orig_patent_app_number] => 11149997 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/149997
Calculating module runtimes on multiple platforms Jun 9, 2005 Abandoned
Array ( [id] => 6953762 [patent_doc_number] => 20050228857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Method for a group of services to operate in two modes simultaneously' [patent_app_type] => utility [patent_app_number] => 11/147727 [patent_app_country] => US [patent_app_date] => 2005-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11626 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20050228857.pdf [firstpage_image] =>[orig_patent_app_number] => 11147727 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/147727
Method for a group of services to operate in two modes simultaneously Jun 7, 2005 Abandoned
Array ( [id] => 7192419 [patent_doc_number] => 20050193051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Logic circuit' [patent_app_type] => utility [patent_app_number] => 11/115149 [patent_app_country] => US [patent_app_date] => 2005-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 33426 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20050193051.pdf [firstpage_image] =>[orig_patent_app_number] => 11115149 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/115149
Logic circuit Apr 26, 2005 Abandoned
Array ( [id] => 6944006 [patent_doc_number] => 20050196055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Method and system for codifying signals that ensure high fidelity reconstruction' [patent_app_type] => utility [patent_app_number] => 11/073306 [patent_app_country] => US [patent_app_date] => 2005-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20050196055.pdf [firstpage_image] =>[orig_patent_app_number] => 11073306 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/073306
Method and system for codifying signals that ensure high fidelity reconstruction Mar 2, 2005 Abandoned
Array ( [id] => 856530 [patent_doc_number] => 07380249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Object manager for common information model' [patent_app_type] => utility [patent_app_number] => 11/070011 [patent_app_country] => US [patent_app_date] => 2005-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8456 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/380/07380249.pdf [firstpage_image] =>[orig_patent_app_number] => 11070011 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/070011
Object manager for common information model Feb 28, 2005 Issued
Menu