Search

Jonathan Cwern

Examiner (ID: 5747, Phone: (571)270-1560 , Office: P/3737 )

Most Active Art Unit
3737
Art Unit(s)
3797, 3737, 3793
Total Applications
910
Issued Applications
426
Pending Applications
90
Abandoned Applications
412

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19022870 [patent_doc_number] => 20240079041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => INTEGRATED CIRCUIT AND MEMORY DEVICE INCLUDING SAMPLING CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/080293 [patent_app_country] => US [patent_app_date] => 2022-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8344 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18080293 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/080293
Integrated circuit and memory device including sampling circuit Dec 12, 2022 Issued
Array ( [id] => 20624757 [patent_doc_number] => 12592269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Semiconductor device, display apparatus, data processing system, and control system of the semiconductor device [patent_app_type] => utility [patent_app_number] => 18/715300 [patent_app_country] => US [patent_app_date] => 2022-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 73 [patent_no_of_words] => 28345 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18715300 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/715300
Semiconductor device, display apparatus, data processing system, and control system of the semiconductor device Dec 4, 2022 Issued
Array ( [id] => 19356151 [patent_doc_number] => 12056599 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Methods of performing processing-in-memory operations, and related devices and systems [patent_app_type] => utility [patent_app_number] => 18/061005 [patent_app_country] => US [patent_app_date] => 2022-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 15539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061005 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/061005
Methods of performing processing-in-memory operations, and related devices and systems Dec 1, 2022 Issued
Array ( [id] => 18223336 [patent_doc_number] => 20230062330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/054746 [patent_app_country] => US [patent_app_date] => 2022-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 42792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054746 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054746
Semiconductor memory device Nov 10, 2022 Issued
Array ( [id] => 19687692 [patent_doc_number] => 20250006237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => MAGNETORESISTIVE EFFECT MEMORY, MEMORY ARRAY, AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/709017 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18709017 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/709017
MAGNETORESISTIVE EFFECT MEMORY, MEMORY ARRAY, AND MEMORY SYSTEM Oct 30, 2022 Pending
Array ( [id] => 18789059 [patent_doc_number] => 20230377672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => ONE-TIME PROGRAMMABLE MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/048462 [patent_app_country] => US [patent_app_date] => 2022-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048462 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048462
One-time programmable memory device and semiconductor memory device including the same Oct 20, 2022 Issued
Array ( [id] => 19670660 [patent_doc_number] => 12183427 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-12-31 [patent_title] => System and method for write clock double data rate duty cycle correction [patent_app_type] => utility [patent_app_number] => 17/967040 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3462 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967040 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/967040
System and method for write clock double data rate duty cycle correction Oct 16, 2022 Issued
Array ( [id] => 19796080 [patent_doc_number] => 12237045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Nonvolatile memory device, controller for controlling the same, storage device having the same, and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/965326 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 12282 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965326 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965326
Nonvolatile memory device, controller for controlling the same, storage device having the same, and operating method thereof Oct 12, 2022 Issued
Array ( [id] => 18159966 [patent_doc_number] => 20230026558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => MANAGING DIELECTRIC STRESS OF A MEMORY DEVICE USING CONTROLLED RAMPING SLOPES [patent_app_type] => utility [patent_app_number] => 17/960304 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960304 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960304
Managing dielectric stress of a memory device using controlled ramping slopes Oct 4, 2022 Issued
Array ( [id] => 19720083 [patent_doc_number] => 12205626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Victim row counters in memory devices [patent_app_type] => utility [patent_app_number] => 17/936494 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7612 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936494 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936494
Victim row counters in memory devices Sep 28, 2022 Issued
Array ( [id] => 19812172 [patent_doc_number] => 12243580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Fin field effect transistor sense amplifier circuitry and related apparatuses and computing systems [patent_app_type] => utility [patent_app_number] => 17/936760 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 9089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936760 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936760
Fin field effect transistor sense amplifier circuitry and related apparatuses and computing systems Sep 28, 2022 Issued
Array ( [id] => 19507640 [patent_doc_number] => 12119069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Anti-fuse memory reading circuit with controllable reading time [patent_app_type] => utility [patent_app_number] => 17/955579 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5389 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955579 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955579
Anti-fuse memory reading circuit with controllable reading time Sep 28, 2022 Issued
Array ( [id] => 18585730 [patent_doc_number] => 20230267994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => FAST, ENERGY EFFICIENT CMOS 2P1R1W REGISTER FILE ARRAY USING HARVESTED DATA [patent_app_type] => utility [patent_app_number] => 17/951049 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951049 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951049
FAST, ENERGY EFFICIENT CMOS 2P1R1W REGISTER FILE ARRAY USING HARVESTED DATA Sep 21, 2022 Abandoned
Array ( [id] => 18270222 [patent_doc_number] => 20230091464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => NON-VOLATILE MEMORY DEVICE WITH IMPROVED CELL CYCLING AND CORRESPONDING METHOD FOR OPERATING THE NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/934102 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934102 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934102
Non-volatile memory device with improved cell cycling and corresponding method for operating the non-volatile memory device Sep 20, 2022 Issued
Array ( [id] => 18140999 [patent_doc_number] => 20230014841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => THREE-DIMENSIONAL ARRAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/949385 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949385 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/949385
Three-dimensional array device Sep 20, 2022 Issued
Array ( [id] => 19858058 [patent_doc_number] => 12260908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Spike current suppression in a memory array [patent_app_type] => utility [patent_app_number] => 17/943520 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8933 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943520
Spike current suppression in a memory array Sep 12, 2022 Issued
Array ( [id] => 18112648 [patent_doc_number] => 20230005528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => MEMORY DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/940065 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940065 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940065
Memory device and electronic device Sep 7, 2022 Issued
Array ( [id] => 18244829 [patent_doc_number] => 20230077140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => MEMORY DEVICE USING SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 17/901982 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 474 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901982 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901982
Memory device using semiconductor element Sep 1, 2022 Issued
Array ( [id] => 19007354 [patent_doc_number] => 20240071425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR WIRING DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/823173 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7391 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823173 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823173
Semiconductor wiring device and method Aug 29, 2022 Issued
Array ( [id] => 18974971 [patent_doc_number] => 20240055063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => STRESS TEST FOR GROWN BAD BLOCKS [patent_app_type] => utility [patent_app_number] => 17/886155 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886155 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/886155
Stress test for grown bad blocks Aug 10, 2022 Issued
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