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Jonathan Han

Examiner (ID: 3446)

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
1536
Issued Applications
1244
Pending Applications
118
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20553221 [patent_doc_number] => 12564035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Airgaps used in backend memory structures [patent_app_type] => utility [patent_app_number] => 17/704410 [patent_app_country] => US [patent_app_date] => 2022-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17704410 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/704410
Airgaps used in backend memory structures Mar 24, 2022 Issued
Array ( [id] => 17723525 [patent_doc_number] => 20220216247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => WAFER LEVEL LENS [patent_app_type] => utility [patent_app_number] => 17/703664 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703664 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703664
Wafer level lens Mar 23, 2022 Issued
Array ( [id] => 18804452 [patent_doc_number] => 11837616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Wafer level lens [patent_app_type] => utility [patent_app_number] => 17/703754 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 13878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703754 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703754
Wafer level lens Mar 23, 2022 Issued
Array ( [id] => 18661235 [patent_doc_number] => 20230307248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH DAMASCENE STRUCTURE BY USING ETCH STOP LAYER [patent_app_type] => utility [patent_app_number] => 17/701927 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701927 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701927
Method for fabricating semiconductor device with damascene structure by using etch stop layer Mar 22, 2022 Issued
Array ( [id] => 17723470 [patent_doc_number] => 20220216192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 17/701083 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701083 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701083
Semiconductor packages and methods of forming same Mar 21, 2022 Issued
Array ( [id] => 17886498 [patent_doc_number] => 20220301976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => CHIP PACKAGING DEVICE AND CORRESPONDING MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/698749 [patent_app_country] => US [patent_app_date] => 2022-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17698749 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/698749
CHIP PACKAGING DEVICE AND CORRESPONDING MANUFACTURING METHOD Mar 17, 2022 Abandoned
Array ( [id] => 17993254 [patent_doc_number] => 20220359291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/689000 [patent_app_country] => US [patent_app_date] => 2022-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17689000 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/689000
Semiconductor structure and method for manufacturing semiconductor structure Mar 7, 2022 Issued
Array ( [id] => 18112925 [patent_doc_number] => 20230005805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/684534 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684534 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684534
Semiconductor device and electronic device Mar 1, 2022 Issued
Array ( [id] => 17917781 [patent_doc_number] => 20220320177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => METHOD FOR MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/683364 [patent_app_country] => US [patent_app_date] => 2022-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17683364 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/683364
Method for manufacturing display device Feb 28, 2022 Issued
Array ( [id] => 20346010 [patent_doc_number] => 12469745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Conductive structures with bottom-less barriers and liners [patent_app_type] => utility [patent_app_number] => 17/652593 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 4404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652593 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652593
Conductive structures with bottom-less barriers and liners Feb 24, 2022 Issued
Array ( [id] => 19101131 [patent_doc_number] => 20240120359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => PHOTODETECTION DEVICE AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/546252 [patent_app_country] => US [patent_app_date] => 2022-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18546252 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/546252
PHOTODETECTION DEVICE AND ELECTRONIC APPARATUS Feb 20, 2022 Pending
Array ( [id] => 18721590 [patent_doc_number] => 11798947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/675163 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 6559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675163 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/675163
Semiconductor device Feb 17, 2022 Issued
Array ( [id] => 19858253 [patent_doc_number] => 12261104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Semiconductor package and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/670635 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 12258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670635 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670635
Semiconductor package and method of fabricating the same Feb 13, 2022 Issued
Array ( [id] => 19213633 [patent_doc_number] => 12002705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Methods and apparatus for forming backside power rails [patent_app_type] => utility [patent_app_number] => 17/670777 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4396 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670777 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670777
Methods and apparatus for forming backside power rails Feb 13, 2022 Issued
Array ( [id] => 19116553 [patent_doc_number] => 20240128303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => OPTOELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/276862 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10238 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18276862 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/276862
OPTOELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SAME Feb 10, 2022 Pending
Array ( [id] => 18608313 [patent_doc_number] => 11749792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Light emitting diode, light emitting diode module, and display device including the same [patent_app_type] => utility [patent_app_number] => 17/592411 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 47 [patent_no_of_words] => 14761 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17592411 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/592411
Light emitting diode, light emitting diode module, and display device including the same Feb 2, 2022 Issued
Array ( [id] => 18183154 [patent_doc_number] => 20230043884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => LAYOUT FOR REDUCING LOADING AT LINE SOCKETS AND/OR FOR INCREASING OVERLAY TOLERANCE WHILE CUTTING LINES [patent_app_type] => utility [patent_app_number] => 17/591119 [patent_app_country] => US [patent_app_date] => 2022-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591119 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/591119
Layout for reducing loading at line sockets and/or for increasing overlay tolerance while cutting lines Feb 1, 2022 Issued
Array ( [id] => 18600216 [patent_doc_number] => 20230275017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/590293 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6886 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17590293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/590293
Semiconductor structure and method for forming the same Jan 31, 2022 Issued
Array ( [id] => 17599500 [patent_doc_number] => 20220149074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => VERTICAL SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/585133 [patent_app_country] => US [patent_app_date] => 2022-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18255 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17585133 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/585133
Vertical semiconductor device and method for fabricating the same Jan 25, 2022 Issued
Array ( [id] => 18431731 [patent_doc_number] => 11676963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Integrated circuit device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/584877 [patent_app_country] => US [patent_app_date] => 2022-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9410 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17584877 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/584877
Integrated circuit device and method of manufacturing the same Jan 25, 2022 Issued
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