Jonathan Han

Array ( [id] => 14101893 [patent_doc_number] => 20190092622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => MULTI-LAYER SEALING FILM FOR HIGH SEAL YIELD [patent_app_type] => utility [patent_app_number] => 16/202444 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10686 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15922111 [patent_doc_number] => 10658304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/202345 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 37 [patent_no_of_words] => 7783 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202345 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15401343 [patent_doc_number] => 10541334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Techniques for integration of Ge-rich p-MOS source/drain [patent_app_type] => utility [patent_app_number] => 16/199445 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 9294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199445 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15823173 [patent_doc_number] => 10636782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Systems and methods for protecting a semiconductor device [patent_app_type] => utility [patent_app_number] => 16/192883 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16192883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15580993 [patent_doc_number] => 10580891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Semiconductor device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/193521 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 43 [patent_no_of_words] => 16747 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15937187 [patent_doc_number] => 20200160227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => MODEL UPDATE BASED ON CHANGE IN EDGE DATA [patent_app_type] => utility [patent_app_number] => 16/191879 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17818723 [patent_doc_number] => 11424348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Display panel preparation method and display panel [patent_app_type] => utility [patent_app_number] => 16/327306 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5798 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16327306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14479795 [patent_doc_number] => 20190191551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => PRINTED CIRCUIT BOARD WITH STRESS RELIEF ZONES FOR COMPONENT AND SOLDER JOINT PROTECTION [patent_app_type] => utility [patent_app_number] => 16/178820 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16178820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16386670 [patent_doc_number] => 10811515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Methods of fabricating semiconductor devices having air-gap spacers [patent_app_type] => utility [patent_app_number] => 16/178928 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16178928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14285619 [patent_doc_number] => 20190140094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SWITCHING DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/178962 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16178962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14285191 [patent_doc_number] => 20190139880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => Semiconductor Arrangement with Reliably Switching Controllable Semiconductor Elements [patent_app_type] => utility [patent_app_number] => 16/179015 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16179015 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16372529 [patent_doc_number] => 10804295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Ferroelectric memory device [patent_app_type] => utility [patent_app_number] => 16/179031 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9345 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16179031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16889197 [patent_doc_number] => 20210175394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => WAVELENGTH CONVERTER [patent_app_type] => utility [patent_app_number] => 16/763869 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16763869 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16609293 [patent_doc_number] => 10910307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Back end of line metallization structure [patent_app_type] => utility [patent_app_number] => 16/178781 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5314 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16178781 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15331631 [patent_doc_number] => 20200006145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => BONDING SUPPORT STRUCTURE (AND RELATED PROCESS) FOR WAFER STACKING [patent_app_type] => utility [patent_app_number] => 16/178819 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16178819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15955547 [patent_doc_number] => 10665690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Gate-controlled bipolar junction transistor and operation method thereof [patent_app_type] => utility [patent_app_number] => 16/163551 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3865 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16163551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15955197 [patent_doc_number] => 10665512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Stress modulation of nFET and pFET fin structures [patent_app_type] => utility [patent_app_number] => 16/163275 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 9462 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16163275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15774049 [patent_doc_number] => 20200118042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => USER ADAPTED DATA PRESENTATION FOR DATA LABELING [patent_app_type] => utility [patent_app_number] => 16/160721 [patent_app_country] => US [patent_app_date] => 2018-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16160721 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17189210 [patent_doc_number] => 20210336095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => MICRO LIGHT EMITTING DIODE DISPLAY PANEL, MICRO LIGHT EMITTING DIODE DISPLAY APPARATUS, AND METHOD OF FABRICATING MICRO LIGHT EMITTING DIODE DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/484212 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16484212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15773981 [patent_doc_number] => 20200118008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => BUILDING DOMAIN MODELS FROM DIALOG INTERACTIONS [patent_app_type] => utility [patent_app_number] => 16/156922 [patent_app_country] => US [patent_app_date] => 2018-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16156922 [rel_patent_id] =>[rel_patent_doc_number] =>)