
Jonathan Han
Examiner (ID: 3833, Phone: (571)270-7546 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 1519 |
| Issued Applications | 1231 |
| Pending Applications | 120 |
| Abandoned Applications | 211 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11911212
[patent_doc_number] => 09780033
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-03
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 15/053182
[patent_app_country] => US
[patent_app_date] => 2016-02-25
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15053182
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/053182 | Semiconductor device and method of manufacturing the same | Feb 24, 2016 | Issued |
Array
(
[id] => 11087729
[patent_doc_number] => 20160284697
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[patent_kind] => A1
[patent_issue_date] => 2016-09-29
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/053262
[patent_app_country] => US
[patent_app_date] => 2016-02-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/053262 | SEMICONDUCTOR DEVICE | Feb 24, 2016 | Abandoned |
Array
(
[id] => 11817848
[patent_doc_number] => 09721806
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[patent_kind] => B2
[patent_issue_date] => 2017-08-01
[patent_title] => 'LDMOS device and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 15/053001
[patent_app_country] => US
[patent_app_date] => 2016-02-25
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[patent_drawing_sheets_cnt] => 3
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/053001 | LDMOS device and fabrication method thereof | Feb 24, 2016 | Issued |
Array
(
[id] => 11510312
[patent_doc_number] => 09601478
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-21
[patent_title] => 'Oxide definition (OD) gradient reduced semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 15/045504
[patent_app_country] => US
[patent_app_date] => 2016-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/045504 | Oxide definition (OD) gradient reduced semiconductor device | Feb 16, 2016 | Issued |
Array
(
[id] => 12229955
[patent_doc_number] => 09917204
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-13
[patent_title] => 'Semiconductor device'
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15044465
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/044465 | Semiconductor device | Feb 15, 2016 | Issued |
Array
(
[id] => 10809702
[patent_doc_number] => 20160155861
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[patent_kind] => A1
[patent_issue_date] => 2016-06-02
[patent_title] => 'Method of Manufacturing a Device by Locally Heating One or More Metalization Layers and by Means of Selective Etching'
[patent_app_type] => utility
[patent_app_number] => 15/017252
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/017252 | Method of manufacturing a device by locally heating one or more metalization layers and by means of selective etching | Feb 4, 2016 | Issued |
Array
(
[id] => 11028960
[patent_doc_number] => 20160225916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-04
[patent_title] => 'STACKED NANOWIRE DEVICE WITH VARIABLE NUMBER OF NANOWIRE CHANNELS'
[patent_app_type] => utility
[patent_app_number] => 15/015766
[patent_app_country] => US
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15015766
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/015766 | STACKED NANOWIRE DEVICE WITH VARIABLE NUMBER OF NANOWIRE CHANNELS | Feb 3, 2016 | Abandoned |
Array
(
[id] => 11551756
[patent_doc_number] => 09620618
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-11
[patent_title] => 'Transistor and method for forming the same'
[patent_app_type] => utility
[patent_app_number] => 15/015196
[patent_app_country] => US
[patent_app_date] => 2016-02-04
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15015196
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/015196 | Transistor and method for forming the same | Feb 3, 2016 | Issued |
Array
(
[id] => 11838012
[patent_doc_number] => 20170219733
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-03
[patent_title] => '3D BLENDING AND ILLUMINATION OF SEISMIC VOLUMES FOR AUTOMATIC DERIVATION OF DISCONTINUITIES'
[patent_app_type] => utility
[patent_app_number] => 15/013717
[patent_app_country] => US
[patent_app_date] => 2016-02-02
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/013717 | 3D blending and illumination of seismic volumes for automatic derivation of discontinuities | Feb 1, 2016 | Issued |
Array
(
[id] => 11026644
[patent_doc_number] => 20160223600
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[patent_kind] => A1
[patent_issue_date] => 2016-08-04
[patent_title] => 'POWER GENERATION PERFORMANCE EVALUATION METHOD AND APPARATUS FOR POWER GENERATOR SET'
[patent_app_type] => utility
[patent_app_number] => 15/013420
[patent_app_country] => US
[patent_app_date] => 2016-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15013420
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/013420 | POWER GENERATION PERFORMANCE EVALUATION METHOD AND APPARATUS FOR POWER GENERATOR SET | Feb 1, 2016 | Abandoned |
Array
(
[id] => 11837618
[patent_doc_number] => 20170219336
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-03
[patent_title] => 'Point Cloud Processing Apparatus and Method'
[patent_app_type] => utility
[patent_app_number] => 15/013410
[patent_app_country] => US
[patent_app_date] => 2016-02-02
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/013410 | Point cloud processing apparatus and method | Feb 1, 2016 | Issued |
Array
(
[id] => 11911343
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[patent_title] => 'Semiconductor device and method for fabricating the same'
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Array
(
[id] => 11036280
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Array
(
[id] => 11043663
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[patent_kind] => A1
[patent_issue_date] => 2016-08-18
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD OF FABRICATING THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/011820 | Semiconductor device having buried gate structure and method of fabricating the same | Jan 31, 2016 | Issued |
Array
(
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Array
(
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[patent_title] => 'Composite substrate with alternating pattern of diamond and metal or metal alloy'
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Array
(
[id] => 13110585
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[patent_title] => Method for generating a manufacturing model for a medical implant
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/007649 | Method for generating a manufacturing model for a medical implant | Jan 26, 2016 | Issued |
Array
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[patent_title] => 'AUTOMATIC CLOSURE SYSTEM IMPACT DETECTION'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/003606 | Methods of forming memory device constructions, methods of forming memory cells, and methods of forming semiconductor constructions | Jan 20, 2016 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/001924 | Image sensor | Jan 19, 2016 | Issued |