Search

Jonathan Han

Examiner (ID: 5679, Phone: (571)270-7546 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
1545
Issued Applications
1249
Pending Applications
122
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9300211 [patent_doc_number] => 08648442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/037620 [patent_app_country] => US [patent_app_date] => 2008-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3545 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12037620 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/037620
Semiconductor device and method of manufacturing the same Feb 25, 2008 Issued
Array ( [id] => 5512117 [patent_doc_number] => 20090212421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'POLYMER INTERLAYER DIELECTRIC AND PASSIVATION MATERIALS FOR A MICROELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 12/037625 [patent_app_country] => US [patent_app_date] => 2008-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5020 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20090212421.pdf [firstpage_image] =>[orig_patent_app_number] => 12037625 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/037625
Polymer interlayer dielectric and passivation materials for a microelectronic device Feb 25, 2008 Issued
Array ( [id] => 4725405 [patent_doc_number] => 20080204946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'MAGNETORESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/037366 [patent_app_country] => US [patent_app_date] => 2008-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6690 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20080204946.pdf [firstpage_image] =>[orig_patent_app_number] => 12037366 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/037366
MAGNETORESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORY DEVICE Feb 25, 2008 Abandoned
Array ( [id] => 4723888 [patent_doc_number] => 20080203429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'Semiconductor Device and a Method of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 12/035260 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3622 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20080203429.pdf [firstpage_image] =>[orig_patent_app_number] => 12035260 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/035260
Semiconductor device and a method of manufacturing the same Feb 20, 2008 Issued
Array ( [id] => 4870650 [patent_doc_number] => 20080197384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'Field Effect Transistor Arrangement' [patent_app_type] => utility [patent_app_number] => 12/035195 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4222 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197384.pdf [firstpage_image] =>[orig_patent_app_number] => 12035195 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/035195
Field Effect Transistor Arrangement Feb 20, 2008 Abandoned
Array ( [id] => 8621778 [patent_doc_number] => 08354693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-15 [patent_title] => 'Solid state imaging device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/035340 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 8670 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12035340 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/035340
Solid state imaging device and method for fabricating the same Feb 20, 2008 Issued
Array ( [id] => 4870715 [patent_doc_number] => 20080197449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'WIRING STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND METHOD AND DEVICE FOR DESIGNING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/035230 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 13880 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197449.pdf [firstpage_image] =>[orig_patent_app_number] => 12035230 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/035230
WIRING STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND METHOD AND DEVICE FOR DESIGNING THE SAME Feb 20, 2008 Abandoned
Array ( [id] => 4723920 [patent_doc_number] => 20080203461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'GATE STRUCTURE OF NAND FLASH MEMORY HAVING INSULATORS EACH FILLED WITH BETWEEN GATE ELECTRODES OF ADJACENT MEMORY CELLS AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/034326 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3103 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20080203461.pdf [firstpage_image] =>[orig_patent_app_number] => 12034326 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034326
GATE STRUCTURE OF NAND FLASH MEMORY HAVING INSULATORS EACH FILLED WITH BETWEEN GATE ELECTRODES OF ADJACENT MEMORY CELLS AND MANUFACTURING METHOD THEREOF Feb 19, 2008 Abandoned
Array ( [id] => 8726006 [patent_doc_number] => 08405127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Method and apparatus for fabricating a heterojunction bipolar transistor' [patent_app_type] => utility [patent_app_number] => 12/034210 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 1626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12034210 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034210
Method and apparatus for fabricating a heterojunction bipolar transistor Feb 19, 2008 Issued
Array ( [id] => 5389131 [patent_doc_number] => 20090206443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'DEVICES INCLUDING FIN TRANSISTORS ROBUST TO GATE SHORTS AND METHODS OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/033780 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 6868 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20090206443.pdf [firstpage_image] =>[orig_patent_app_number] => 12033780 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/033780
Devices including fin transistors robust to gate shorts and methods of making the same Feb 18, 2008 Issued
Array ( [id] => 5389095 [patent_doc_number] => 20090206407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRESS AND METHODS OF MANUFACTURING' [patent_app_type] => utility [patent_app_number] => 12/033280 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4540 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20090206407.pdf [firstpage_image] =>[orig_patent_app_number] => 12033280 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/033280
Semiconductor devices having tensile and/or compressive stress and methods of manufacturing Feb 18, 2008 Issued
Array ( [id] => 4954133 [patent_doc_number] => 20080187157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'ELECTRICAL CONTACTS USING CONDUCTIVE SILICONE IN HEARING ASSISTANCE DEVICES' [patent_app_type] => utility [patent_app_number] => 12/027173 [patent_app_country] => US [patent_app_date] => 2008-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1888 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20080187157.pdf [firstpage_image] =>[orig_patent_app_number] => 12027173 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/027173
Electrical contacts using conductive silicone in hearing assistance devices Feb 5, 2008 Issued
Array ( [id] => 4812337 [patent_doc_number] => 20080192968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Hearing apparatus with automatic alignment of the directional microphone and corresponding method' [patent_app_type] => utility [patent_app_number] => 12/012751 [patent_app_country] => US [patent_app_date] => 2008-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1727 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20080192968.pdf [firstpage_image] =>[orig_patent_app_number] => 12012751 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/012751
Hearing apparatus with automatic alignment of the directional microphone and corresponding method Feb 4, 2008 Abandoned
Array ( [id] => 4675186 [patent_doc_number] => 20080212815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'APPARATUS FOR TRANSMITTING AND RECEIVING SOUND' [patent_app_type] => utility [patent_app_number] => 12/025597 [patent_app_country] => US [patent_app_date] => 2008-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3606 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20080212815.pdf [firstpage_image] =>[orig_patent_app_number] => 12025597 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/025597
Apparatus for transmitting and receiving sound Feb 3, 2008 Issued
Array ( [id] => 4697302 [patent_doc_number] => 20080219486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'METHOD AND DEVICE FOR EVALUATING AUDITORY HEALTH' [patent_app_type] => utility [patent_app_number] => 12/025146 [patent_app_country] => US [patent_app_date] => 2008-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5594 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20080219486.pdf [firstpage_image] =>[orig_patent_app_number] => 12025146 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/025146
Method and device for evaluating auditory health Feb 3, 2008 Issued
Array ( [id] => 4774923 [patent_doc_number] => 20080282921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'ELECTRONIC DEVICES AND PROCESSES FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/972246 [patent_app_country] => US [patent_app_date] => 2008-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 32159 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0282/20080282921.pdf [firstpage_image] =>[orig_patent_app_number] => 11972246 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/972246
ELECTRONIC DEVICES AND PROCESSES FOR FORMING THE SAME Jan 9, 2008 Abandoned
Array ( [id] => 8544001 [patent_doc_number] => 08319295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Use of F-based gate etch to passivate the high-k/metal gate stack for deep submicron transistor technologies' [patent_app_type] => utility [patent_app_number] => 11/971845 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 6185 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11971845 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/971845
Use of F-based gate etch to passivate the high-k/metal gate stack for deep submicron transistor technologies Jan 8, 2008 Issued
Array ( [id] => 8270292 [patent_doc_number] => 08211795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Method of forming a dielectric cap layer for a copper metallization by using a hydrogen based thermal-chemical treatment' [patent_app_type] => utility [patent_app_number] => 11/970876 [patent_app_country] => US [patent_app_date] => 2008-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 8552 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11970876 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/970876
Method of forming a dielectric cap layer for a copper metallization by using a hydrogen based thermal-chemical treatment Jan 7, 2008 Issued
Array ( [id] => 4925151 [patent_doc_number] => 20080164514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'Semiconductor device having three-demensional transistor and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/007166 [patent_app_country] => US [patent_app_date] => 2008-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5817 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164514.pdf [firstpage_image] =>[orig_patent_app_number] => 12007166 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/007166
Semiconductor device having three-demensional transistor and manufacturing method thereof Jan 6, 2008 Abandoned
Array ( [id] => 5432184 [patent_doc_number] => 20090166770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'METHOD OF FABRICATING GATE ELECTRODE FOR GATE OF MOSFET AND STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 11/968396 [patent_app_country] => US [patent_app_date] => 2008-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2130 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20090166770.pdf [firstpage_image] =>[orig_patent_app_number] => 11968396 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968396
METHOD OF FABRICATING GATE ELECTRODE FOR GATE OF MOSFET AND STRUCTURE THEREOF Jan 1, 2008 Abandoned
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