Search

Jonathan R Horner

Examiner (ID: 580, Phone: (571)270-7358 , Office: P/2694 )

Most Active Art Unit
2694
Art Unit(s)
OITP, OPIM, 2629, 2694
Total Applications
316
Issued Applications
126
Pending Applications
1
Abandoned Applications
189

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4458070 [patent_doc_number] => 07893710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'Termination circuit and impedance matching device including the same' [patent_app_type] => utility [patent_app_number] => 12/494394 [patent_app_country] => US [patent_app_date] => 2009-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7015 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/893/07893710.pdf [firstpage_image] =>[orig_patent_app_number] => 12494394 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/494394
Termination circuit and impedance matching device including the same Jun 29, 2009 Issued
Array ( [id] => 6287262 [patent_doc_number] => 20100237901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'SEMICONDUCTOR APPARATUS AND DATA OUTPUT METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/494643 [patent_app_country] => US [patent_app_date] => 2009-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3802 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20100237901.pdf [firstpage_image] =>[orig_patent_app_number] => 12494643 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/494643
SEMICONDUCTOR APPARATUS AND DATA OUTPUT METHOD OF THE SAME Jun 29, 2009 Abandoned
Array ( [id] => 6282316 [patent_doc_number] => 20100156455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'IMPEDANCE CALIBRATION PERIOD SETTING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/493438 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20100156455.pdf [firstpage_image] =>[orig_patent_app_number] => 12493438 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493438
Impedance calibration period setting circuit and semiconductor integrated circuit Jun 28, 2009 Issued
Array ( [id] => 4477929 [patent_doc_number] => 07868650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Termination control circuit and method for global input/output line' [patent_app_type] => utility [patent_app_number] => 12/493266 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3284 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/868/07868650.pdf [firstpage_image] =>[orig_patent_app_number] => 12493266 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493266
Termination control circuit and method for global input/output line Jun 28, 2009 Issued
Array ( [id] => 6330885 [patent_doc_number] => 20100327907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'ENHANCED PERMUTABLE SWITCHING NETWORK WITH MULTICASTING SIGNALS FOR INTERCONNECTION FABRIC' [patent_app_type] => utility [patent_app_number] => 12/491089 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9579 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327907.pdf [firstpage_image] =>[orig_patent_app_number] => 12491089 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/491089
Enhanced permutable switching network with multicasting signals for interconnection fabric Jun 23, 2009 Issued
Array ( [id] => 4635174 [patent_doc_number] => 08013630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Ternary valve input circuit' [patent_app_type] => utility [patent_app_number] => 12/484670 [patent_app_country] => US [patent_app_date] => 2009-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4403 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/013/08013630.pdf [firstpage_image] =>[orig_patent_app_number] => 12484670 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/484670
Ternary valve input circuit Jun 14, 2009 Issued
Array ( [id] => 7978979 [patent_doc_number] => 08072237 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-12-06 [patent_title] => 'Computer-aided design tools and memory element power supply circuitry for selectively overdriving circuit blocks' [patent_app_type] => utility [patent_app_number] => 12/478713 [patent_app_country] => US [patent_app_date] => 2009-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11226 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/072/08072237.pdf [firstpage_image] =>[orig_patent_app_number] => 12478713 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/478713
Computer-aided design tools and memory element power supply circuitry for selectively overdriving circuit blocks Jun 3, 2009 Issued
Array ( [id] => 4505846 [patent_doc_number] => 07949136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Security circuit having an electrical fuse ROM' [patent_app_type] => utility [patent_app_number] => 12/387099 [patent_app_country] => US [patent_app_date] => 2009-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6960 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/949/07949136.pdf [firstpage_image] =>[orig_patent_app_number] => 12387099 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/387099
Security circuit having an electrical fuse ROM Apr 27, 2009 Issued
Array ( [id] => 84842 [patent_doc_number] => 07741865 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-22 [patent_title] => 'Soft error upset hardened integrated circuit systems and methods' [patent_app_type] => utility [patent_app_number] => 12/430848 [patent_app_country] => US [patent_app_date] => 2009-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 9500 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/741/07741865.pdf [firstpage_image] =>[orig_patent_app_number] => 12430848 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/430848
Soft error upset hardened integrated circuit systems and methods Apr 26, 2009 Issued
Array ( [id] => 4444233 [patent_doc_number] => 07928765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Tuning high-side and low-side CMOS data-paths in CML-to-CMOS signal converter' [patent_app_type] => utility [patent_app_number] => 12/413723 [patent_app_country] => US [patent_app_date] => 2009-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/928/07928765.pdf [firstpage_image] =>[orig_patent_app_number] => 12413723 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/413723
Tuning high-side and low-side CMOS data-paths in CML-to-CMOS signal converter Mar 29, 2009 Issued
Array ( [id] => 5531206 [patent_doc_number] => 20090230994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'DOMINO LOGIC CIRCUIT AND PIPELINED DOMINO LOGIC CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/381360 [patent_app_country] => US [patent_app_date] => 2009-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6159 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20090230994.pdf [firstpage_image] =>[orig_patent_app_number] => 12381360 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/381360
Domino logic circuit and pipelined domino logic circuit Mar 10, 2009 Issued
Array ( [id] => 5484130 [patent_doc_number] => 20090273895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'PORTABLE TERMINAL DEVICE' [patent_app_type] => utility [patent_app_number] => 12/366696 [patent_app_country] => US [patent_app_date] => 2009-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7551 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20090273895.pdf [firstpage_image] =>[orig_patent_app_number] => 12366696 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/366696
PORTABLE TERMINAL DEVICE Feb 5, 2009 Abandoned
Array ( [id] => 6325542 [patent_doc_number] => 20100197364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'Apparatus controllable by mobile phone for power management' [patent_app_type] => utility [patent_app_number] => 12/365906 [patent_app_country] => US [patent_app_date] => 2009-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2293 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20100197364.pdf [firstpage_image] =>[orig_patent_app_number] => 12365906 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/365906
Apparatus controllable by mobile phone for power management Feb 4, 2009 Abandoned
Array ( [id] => 4537651 [patent_doc_number] => 07872499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Level shift circuit, and driver and display system using the same' [patent_app_type] => utility [patent_app_number] => 12/320778 [patent_app_country] => US [patent_app_date] => 2009-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 21771 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872499.pdf [firstpage_image] =>[orig_patent_app_number] => 12320778 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/320778
Level shift circuit, and driver and display system using the same Feb 3, 2009 Issued
Array ( [id] => 7537010 [patent_doc_number] => 08050651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Detector, RF circuit with detector, and mobile device with RF circuit' [patent_app_type] => utility [patent_app_number] => 12/365763 [patent_app_country] => US [patent_app_date] => 2009-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 13923 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/050/08050651.pdf [firstpage_image] =>[orig_patent_app_number] => 12365763 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/365763
Detector, RF circuit with detector, and mobile device with RF circuit Feb 3, 2009 Issued
Array ( [id] => 6436927 [patent_doc_number] => 20100188117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'Defining a Default Configuration for Configurable Circuitry in an Integrated Circuit' [patent_app_type] => utility [patent_app_number] => 12/362128 [patent_app_country] => US [patent_app_date] => 2009-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5204 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20100188117.pdf [firstpage_image] =>[orig_patent_app_number] => 12362128 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/362128
Defining a default configuration for configurable circuitry in an integrated circuit Jan 28, 2009 Issued
Array ( [id] => 5344393 [patent_doc_number] => 20090183043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/354203 [patent_app_country] => US [patent_app_date] => 2009-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5881 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20090183043.pdf [firstpage_image] =>[orig_patent_app_number] => 12354203 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/354203
Semiconductor integrated circuit Jan 14, 2009 Issued
Array ( [id] => 5262769 [patent_doc_number] => 20090115454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'Method and System for Reducing Power Consumption with Configurable Latches and Registers' [patent_app_type] => utility [patent_app_number] => 12/348807 [patent_app_country] => US [patent_app_date] => 2009-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4504 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20090115454.pdf [firstpage_image] =>[orig_patent_app_number] => 12348807 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/348807
Apparatus for reducing power consumption with configurable latches and registers Jan 4, 2009 Issued
Array ( [id] => 5407749 [patent_doc_number] => 20090121647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'MULTI-LAMP BACKLIGHT APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/263744 [patent_app_country] => US [patent_app_date] => 2008-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2548 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20090121647.pdf [firstpage_image] =>[orig_patent_app_number] => 12263744 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/263744
Multi-lamp backlight apparatus Nov 2, 2008 Issued
Array ( [id] => 5282719 [patent_doc_number] => 20090096393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'Electron-Emissive Element and Display Element' [patent_app_type] => utility [patent_app_number] => 12/252359 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6686 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20090096393.pdf [firstpage_image] =>[orig_patent_app_number] => 12252359 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252359
Electron emissive element and display element Oct 14, 2008 Issued
Menu