Jonathan Wade Miles

Array ( [id] => 11482333 [patent_doc_number] => 09588880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Adaptive address translation method for high bandwidth and low IR concurrently and memory controller using the same' [patent_app_type] => utility [patent_app_number] => 13/116751 [patent_app_country] => US [patent_app_date] => 2011-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3756 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13116751 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9954337 [patent_doc_number] => 09003149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Transparent file system migration to a new physical location' [patent_app_type] => utility [patent_app_number] => 13/116847 [patent_app_country] => US [patent_app_date] => 2011-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7160 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13116847 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7582220 [patent_doc_number] => 20110296103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'STORAGE APPARATUS, APPARATUS CONTROL METHOD, AND RECORDING MEDIUM FOR STORAGE APPARATUS CONTROL PROGRAM' [patent_app_type] => utility [patent_app_number] => 13/116298 [patent_app_country] => US [patent_app_date] => 2011-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12987 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20110296103.pdf [firstpage_image] =>[orig_patent_app_number] => 13116298 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8279919 [patent_doc_number] => 20120173795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'SOLID STATE DRIVE WITH LOW WRITE AMPLIFICATION' [patent_app_type] => utility [patent_app_number] => 13/115716 [patent_app_country] => US [patent_app_date] => 2011-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4486 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13115716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8504534 [patent_doc_number] => 20120303942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'CACHING OF BOOT DATA IN A STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/115236 [patent_app_country] => US [patent_app_date] => 2011-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5655 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13115236 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9847574 [patent_doc_number] => 08949507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Method for performing block management, and associated memory device and controller thereof' [patent_app_type] => utility [patent_app_number] => 13/115962 [patent_app_country] => US [patent_app_date] => 2011-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4692 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13115962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9430881 [patent_doc_number] => 08706966 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-22 [patent_title] => 'System and method for adaptively configuring an L2 cache memory mesh' [patent_app_type] => utility [patent_app_number] => 13/115029 [patent_app_country] => US [patent_app_date] => 2011-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6061 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13115029 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10512218 [patent_doc_number] => 09239796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-19 [patent_title] => 'Methods, systems, and computer readable media for caching and using scatter list metadata to control direct memory access (DMA) receiving of network protocol data' [patent_app_type] => utility [patent_app_number] => 13/115078 [patent_app_country] => US [patent_app_date] => 2011-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13115078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7512681 [patent_doc_number] => 20110258391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'APPARATUS, SYSTEM, AND METHOD FOR DESTAGING CACHED DATA' [patent_app_type] => utility [patent_app_number] => 13/088211 [patent_app_country] => US [patent_app_date] => 2011-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 46958 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20110258391.pdf [firstpage_image] =>[orig_patent_app_number] => 13088211 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6006420 [patent_doc_number] => 20110119659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'RUNTIME MACHINE SUPPORTED METHOD LEVEL CACHING' [patent_app_type] => utility [patent_app_number] => 13/012272 [patent_app_country] => US [patent_app_date] => 2011-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7357 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20110119659.pdf [firstpage_image] =>[orig_patent_app_number] => 13012272 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7993027 [patent_doc_number] => 08078820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-13 [patent_title] => 'Managing message queues' [patent_app_type] => utility [patent_app_number] => 12/960648 [patent_app_country] => US [patent_app_date] => 2010-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 7783 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/078/08078820.pdf [firstpage_image] =>[orig_patent_app_number] => 12960648 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8213852 [patent_doc_number] => 20120131287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'STORAGE CONTROL APPARATUS AND LOGICAL VOLUME SIZE SETTING METHOD' [patent_app_type] => utility [patent_app_number] => 13/054044 [patent_app_country] => US [patent_app_date] => 2010-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 15172 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20120131287.pdf [firstpage_image] =>[orig_patent_app_number] => 13054044 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9926232 [patent_doc_number] => 08984217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'System and method of reducing power usage of a content addressable memory' [patent_app_type] => utility [patent_app_number] => 12/862277 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3613 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12862277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7792883 [patent_doc_number] => 20120054439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'METHOD AND APPARATUS FOR ALLOCATING CACHE BANDWIDTH TO MULTIPLE PROCESSORS' [patent_app_type] => utility [patent_app_number] => 12/862286 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5131 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20120054439.pdf [firstpage_image] =>[orig_patent_app_number] => 12862286 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6197992 [patent_doc_number] => 20110029750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-03 [patent_title] => 'METHOD AND APPARATUS FOR MANAGING DATA USING JAVA APPLICATION IN MOBILE TERMINAL' [patent_app_type] => utility [patent_app_number] => 12/845019 [patent_app_country] => US [patent_app_date] => 2010-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6038 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20110029750.pdf [firstpage_image] =>[orig_patent_app_number] => 12845019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11510036 [patent_doc_number] => 09601199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Iterator register for structured memory' [patent_app_type] => utility [patent_app_number] => 12/842958 [patent_app_country] => US [patent_app_date] => 2010-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 14607 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12842958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6593195 [patent_doc_number] => 20100274963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'STORAGE SYSTEM AND OPERATION METHOD OF STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/830865 [patent_app_country] => US [patent_app_date] => 2010-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 17970 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20100274963.pdf [firstpage_image] =>[orig_patent_app_number] => 12830865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6633610 [patent_doc_number] => 20100325360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'MULTI-CORE PROCESSOR AND MULTI-CORE PROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/813567 [patent_app_country] => US [patent_app_date] => 2010-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0325/20100325360.pdf [firstpage_image] =>[orig_patent_app_number] => 12813567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6132216 [patent_doc_number] => 20110007085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'MEMORY CALIBRATION METHOD AND DISPLAY APPARATUS APPLYING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/779626 [patent_app_country] => US [patent_app_date] => 2010-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3769 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20110007085.pdf [firstpage_image] =>[orig_patent_app_number] => 12779626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14037851 [patent_doc_number] => 10230692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Distributed storage processing module [patent_app_type] => utility [patent_app_number] => 12/775299 [patent_app_country] => US [patent_app_date] => 2010-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 23352 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12775299 [rel_patent_id] =>[rel_patent_doc_number] =>)