Joon H. Hwang

Array ( [id] => 865905 [patent_doc_number] => 07368955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Current-balanced logic circuit' [patent_app_type] => utility [patent_app_number] => 11/390180 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5090 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368955.pdf [firstpage_image] =>[orig_patent_app_number] => 11390180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 865936 [patent_doc_number] => 07368975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Methods and apparatus for reduced hardware multiple variable voltage generator' [patent_app_type] => utility [patent_app_number] => 11/376606 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368975.pdf [firstpage_image] =>[orig_patent_app_number] => 11376606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4925566 [patent_doc_number] => 20080164929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'Electronic Circuit Wherein an Asynchronous Delay is Realized' [patent_app_type] => utility [patent_app_number] => 11/908966 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3960 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164929.pdf [firstpage_image] =>[orig_patent_app_number] => 11908966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 803751 [patent_doc_number] => 07423458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-09 [patent_title] => 'Multiple sampling sample and hold architectures' [patent_app_type] => utility [patent_app_number] => 11/371136 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 5531 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/423/07423458.pdf [firstpage_image] =>[orig_patent_app_number] => 11371136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5692126 [patent_doc_number] => 20060152271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Interface system between controller IC and driver IC, and IC suitable for such interface system' [patent_app_type] => utility [patent_app_number] => 11/370506 [patent_app_country] => US [patent_app_date] => 2006-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3825 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20060152271.pdf [firstpage_image] =>[orig_patent_app_number] => 11370506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5110924 [patent_doc_number] => 20070194839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Tunable balanced loss compensation in an electronic filter' [patent_app_type] => utility [patent_app_number] => 11/360257 [patent_app_country] => US [patent_app_date] => 2006-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3255 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20070194839.pdf [firstpage_image] =>[orig_patent_app_number] => 11360257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5869814 [patent_doc_number] => 20060164135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Driver circuit' [patent_app_type] => utility [patent_app_number] => 11/337809 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2699 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20060164135.pdf [firstpage_image] =>[orig_patent_app_number] => 11337809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5676476 [patent_doc_number] => 20060181831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Gate drive circuit, semiconductor module and method for driving switching element' [patent_app_type] => utility [patent_app_number] => 11/337612 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20060181831.pdf [firstpage_image] =>[orig_patent_app_number] => 11337612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5703542 [patent_doc_number] => 20060192589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Inverter apparatus with improved gate drive for power MOSFET' [patent_app_type] => utility [patent_app_number] => 11/337595 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4039 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20060192589.pdf [firstpage_image] =>[orig_patent_app_number] => 11337595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5160172 [patent_doc_number] => 20070173216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Method and circuit for squelch detection in serial communications' [patent_app_type] => utility [patent_app_number] => 11/338526 [patent_app_country] => US [patent_app_date] => 2006-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5013 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20070173216.pdf [firstpage_image] =>[orig_patent_app_number] => 11338526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 196792 [patent_doc_number] => 07635994 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-12-22 [patent_title] => 'Fast rail-to-rail voltage comparator and method for rail-to-rail voltage comparison' [patent_app_type] => utility [patent_app_number] => 11/336464 [patent_app_country] => US [patent_app_date] => 2006-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3820 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/635/07635994.pdf [firstpage_image] =>[orig_patent_app_number] => 11336464 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 432814 [patent_doc_number] => 07265591 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-04 [patent_title] => 'CMOS driver with minimum shoot-through current' [patent_app_type] => utility [patent_app_number] => 11/304820 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6644 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/265/07265591.pdf [firstpage_image] =>[orig_patent_app_number] => 11304820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 409158 [patent_doc_number] => 07286005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'Supply voltage switching circuit' [patent_app_type] => utility [patent_app_number] => 11/300760 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1922 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/286/07286005.pdf [firstpage_image] =>[orig_patent_app_number] => 11300760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 594235 [patent_doc_number] => 07436221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Methods and apparatus for ultra-low leakage analog storage' [patent_app_type] => utility [patent_app_number] => 11/256632 [patent_app_country] => US [patent_app_date] => 2005-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 9156 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/436/07436221.pdf [firstpage_image] =>[orig_patent_app_number] => 11256632 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5741624 [patent_doc_number] => 20060087347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-27 [patent_title] => 'Input circuit and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/253625 [patent_app_country] => US [patent_app_date] => 2005-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5167 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20060087347.pdf [firstpage_image] =>[orig_patent_app_number] => 11253625 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5805577 [patent_doc_number] => 20060091930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Equalizing transceiver with reduced parasitic capacitance' [patent_app_type] => utility [patent_app_number] => 11/251139 [patent_app_country] => US [patent_app_date] => 2005-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12741 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20060091930.pdf [firstpage_image] =>[orig_patent_app_number] => 11251139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5878696 [patent_doc_number] => 20060028251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Frequency divider system' [patent_app_type] => utility [patent_app_number] => 11/244547 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5619 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20060028251.pdf [firstpage_image] =>[orig_patent_app_number] => 11244547 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 278555 [patent_doc_number] => 07557633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'High speed analog envelope detector' [patent_app_type] => utility [patent_app_number] => 11/242754 [patent_app_country] => US [patent_app_date] => 2005-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5900 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/557/07557633.pdf [firstpage_image] =>[orig_patent_app_number] => 11242754 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5708513 [patent_doc_number] => 20060049857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Switch linearized track and hold circuit for switch linearization' [patent_app_type] => utility [patent_app_number] => 11/222227 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2673 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20060049857.pdf [firstpage_image] =>[orig_patent_app_number] => 11222227 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5708510 [patent_doc_number] => 20060049854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Current sense shunt resistor circuit' [patent_app_type] => utility [patent_app_number] => 11/208821 [patent_app_country] => US [patent_app_date] => 2005-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20060049854.pdf [firstpage_image] =>[orig_patent_app_number] => 11208821 [rel_patent_id] =>[rel_patent_doc_number] =>)