Search

Jorge L. Salazar Jr.

Examiner (ID: 2284, Phone: (571)272-9326 , Office: P/2842 )

Most Active Art Unit
2843
Art Unit(s)
2843, 2842
Total Applications
1048
Issued Applications
900
Pending Applications
124
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13797495 [patent_doc_number] => 20190012286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => EXPANSION BUS DEVICES [patent_app_type] => utility [patent_app_number] => 16/065877 [patent_app_country] => US [patent_app_date] => 2016-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16065877 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/065877
Expansion bus devices comprising retimer switches Jan 28, 2016 Issued
Array ( [id] => 11711141 [patent_doc_number] => 20170179640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'DEVICE WITH MAGNET(S) FOR ENGAGING WITH ANOTHER DEVICE' [patent_app_type] => utility [patent_app_number] => 14/979180 [patent_app_country] => US [patent_app_date] => 2015-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14979180 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/979180
Device with magnet(s) for engaging with another device Dec 21, 2015 Issued
Array ( [id] => 13142375 [patent_doc_number] => 10088514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Orientation indicator with pin signal alteration [patent_app_type] => utility [patent_app_number] => 14/979243 [patent_app_country] => US [patent_app_date] => 2015-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6719 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14979243 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/979243
Orientation indicator with pin signal alteration Dec 21, 2015 Issued
Array ( [id] => 13017485 [patent_doc_number] => 10031857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Address translation services for direct accessing of local memory over a network fabric [patent_app_type] => utility [patent_app_number] => 14/953462 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 11661 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953462 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953462
Address translation services for direct accessing of local memory over a network fabric Nov 29, 2015 Issued
Array ( [id] => 11665274 [patent_doc_number] => 20170153993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-01 [patent_title] => 'SMART DMA ENGINE FOR A NETWORK-ON-A-CHIP PROCESSOR' [patent_app_type] => utility [patent_app_number] => 14/953594 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953594 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953594
DMA engine for transferring data in a network-on-a-chip processor Nov 29, 2015 Issued
Array ( [id] => 13130405 [patent_doc_number] => 10083134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-25 [patent_title] => Configurable processor interrupts for allowing an application to independently handle interrupts [patent_app_type] => utility [patent_app_number] => 14/953309 [patent_app_country] => US [patent_app_date] => 2015-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2777 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953309 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953309
Configurable processor interrupts for allowing an application to independently handle interrupts Nov 27, 2015 Issued
Array ( [id] => 11338608 [patent_doc_number] => 20160364364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'LOW LATENCY DATA EXCHANGE BETWEEN PROCESSING ELEMENTS' [patent_app_type] => utility [patent_app_number] => 14/948656 [patent_app_country] => US [patent_app_date] => 2015-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5651 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948656 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948656
High bandwidth low latency data exchange between processing elements Nov 22, 2015 Issued
Array ( [id] => 12046448 [patent_doc_number] => 09824050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'Shared PCIe end point system including a PCIe switch and method for initializing the switch' [patent_app_type] => utility [patent_app_number] => 14/948187 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5857 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948187 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948187
Shared PCIe end point system including a PCIe switch and method for initializing the switch Nov 19, 2015 Issued
Array ( [id] => 11909922 [patent_doc_number] => 09778730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Sleep mode initialization in a distributed computing system' [patent_app_type] => utility [patent_app_number] => 14/942594 [patent_app_country] => US [patent_app_date] => 2015-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 21789 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14942594 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/942594
Sleep mode initialization in a distributed computing system Nov 15, 2015 Issued
Array ( [id] => 13185715 [patent_doc_number] => 10108377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Storage processing unit arrays and methods of use [patent_app_type] => utility [patent_app_number] => 14/941198 [patent_app_country] => US [patent_app_date] => 2015-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 6853 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14941198 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/941198
Storage processing unit arrays and methods of use Nov 12, 2015 Issued
Array ( [id] => 10793811 [patent_doc_number] => 20160139968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'Autonomous Instrument Concurrency Management' [patent_app_type] => utility [patent_app_number] => 14/940370 [patent_app_country] => US [patent_app_date] => 2015-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9311 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14940370 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/940370
Autonomous management of concurrent servicing of multiple clients by an instrument Nov 12, 2015 Issued
Array ( [id] => 10793902 [patent_doc_number] => 20160140059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'MULTIPLE MEMORY MANAGEMENT UNITS' [patent_app_type] => utility [patent_app_number] => 14/940982 [patent_app_country] => US [patent_app_date] => 2015-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5667 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14940982 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/940982
Approach for interfacing a pipeline with two or more interfaces in a processor Nov 12, 2015 Issued
Array ( [id] => 11629674 [patent_doc_number] => 20170139863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'Interrupt Controlled Prefetching and Caching Mechanism for Enhanced Processor Throughput' [patent_app_type] => utility [patent_app_number] => 14/939062 [patent_app_country] => US [patent_app_date] => 2015-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4180 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14939062 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/939062
Interrupt-controlled direct memory access peripheral data transfer Nov 11, 2015 Issued
Array ( [id] => 11629684 [patent_doc_number] => 20170139872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'COMMUNICATING LOW-SPEED AND HIGH-SPEED PARALLEL BIT STREAMS OVER A HIGH-SPEED SERIAL BUS' [patent_app_type] => utility [patent_app_number] => 14/939020 [patent_app_country] => US [patent_app_date] => 2015-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11905 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14939020 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/939020
Communication low-speed and high-speed parallel bit streams over a high-speed serial bus Nov 11, 2015 Issued
Array ( [id] => 12025839 [patent_doc_number] => 20170315938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'INFORMATION PROCESSING DEVICE, METHOD OF CONTROLLING INFORMATION PROCESSING DEVICE, AND COMPUTER PROGRAM' [patent_app_type] => utility [patent_app_number] => 15/526090 [patent_app_country] => US [patent_app_date] => 2015-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13384 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15526090 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/526090
Information processing device and method for controlling input/output devices via designated functions Nov 10, 2015 Issued
Array ( [id] => 12310515 [patent_doc_number] => 09939879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor [patent_app_type] => utility [patent_app_number] => 14/875930 [patent_app_country] => US [patent_app_date] => 2015-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4587 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14875930 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/875930
Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor Oct 5, 2015 Issued
Array ( [id] => 11903530 [patent_doc_number] => 09772964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Multicore processor system, computer product, assigning method, and control method' [patent_app_type] => utility [patent_app_number] => 14/873015 [patent_app_country] => US [patent_app_date] => 2015-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 8753 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14873015 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/873015
Multicore processor system, computer product, assigning method, and control method Sep 30, 2015 Issued
Array ( [id] => 10672715 [patent_doc_number] => 20160018860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'INSERTION AND EXTRACTION STRUCTURE OF CARD-SHAPED COMPONENT AND ELECTRONIC APPARATUS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/866532 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2605 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14866532 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/866532
Insertion and extraction structure with inclined surfaces of card-shaped component and electronic apparatus including the same Sep 24, 2015 Issued
Array ( [id] => 10462329 [patent_doc_number] => 20150347344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'CONNECTING MULTIPLE SLAVE DEVICES TO SINGLE MASTER CONTROLLER IN BUS SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/826443 [patent_app_country] => US [patent_app_date] => 2015-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4882 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14826443 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/826443
Connecting multiple slave devices to single master controller in bus system Aug 13, 2015 Issued
Array ( [id] => 11853546 [patent_doc_number] => 20170228038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'FLIP COVER WIRELESS KEYBOARD' [patent_app_type] => utility [patent_app_number] => 15/502366 [patent_app_country] => US [patent_app_date] => 2015-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7827 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15502366 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/502366
Flip cover wireless keyboard which utilizes wireless protocols for harvesting power and communicating with digital apparatus Aug 6, 2015 Issued
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