Search

Jorge L. Salazar Jr.

Examiner (ID: 2284, Phone: (571)272-9326 , Office: P/2842 )

Most Active Art Unit
2843
Art Unit(s)
2843, 2842
Total Applications
1048
Issued Applications
900
Pending Applications
124
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12513882 [patent_doc_number] => 10002093 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-19 [patent_title] => Configuring multi-line serial computer expansion bus communication links using bifurcation settings [patent_app_type] => utility [patent_app_number] => 14/740144 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8015 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14740144 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/740144
Configuring multi-line serial computer expansion bus communication links using bifurcation settings Jun 14, 2015 Issued
Array ( [id] => 12256047 [patent_doc_number] => 09928190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-27 [patent_title] => 'High bandwidth low latency data exchange between processing elements' [patent_app_type] => utility [patent_app_number] => 14/739014 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5618 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14739014 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/739014
High bandwidth low latency data exchange between processing elements Jun 14, 2015 Issued
Array ( [id] => 12414363 [patent_doc_number] => 09971730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Link layer to physical layer (PHY) serial interface [patent_app_type] => utility [patent_app_number] => 14/739439 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6530 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14739439 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/739439
Link layer to physical layer (PHY) serial interface Jun 14, 2015 Issued
Array ( [id] => 10478331 [patent_doc_number] => 20150363348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'AUTOMOBILE ADAPTOR SYSTEM, APPARATUS AND METHODOLOGY' [patent_app_type] => utility [patent_app_number] => 14/737321 [patent_app_country] => US [patent_app_date] => 2015-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3797 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14737321 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/737321
AUTOMOBILE ADAPTOR SYSTEM, APPARATUS AND METHODOLOGY Jun 10, 2015 Abandoned
Array ( [id] => 10478327 [patent_doc_number] => 20150363345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'APPARATUSES AND METHODS OF INCREASING OFF-CHIP BANDWIDTH' [patent_app_type] => utility [patent_app_number] => 14/737397 [patent_app_country] => US [patent_app_date] => 2015-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9504 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14737397 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/737397
Mode switching for increased off-chip bandwidth Jun 10, 2015 Issued
Array ( [id] => 10404397 [patent_doc_number] => 20150289405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'SYSTEM FOR BLIND MATE ADAPTING FIELD REPLACEABLE UNITS TO BAYS IN STORAGE RACK' [patent_app_type] => utility [patent_app_number] => 14/725803 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 34808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725803 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/725803
Backplane nodes for blind mate adapting field replaceable units to bays in storage rack May 28, 2015 Issued
Array ( [id] => 10982790 [patent_doc_number] => 20160179734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'METHOD AND SYSTEM FOR HOT-PLUG FUNCTIONS' [patent_app_type] => utility [patent_app_number] => 14/708857 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14708857 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/708857
Hot-pluggable computing system May 10, 2015 Issued
Array ( [id] => 11272675 [patent_doc_number] => 20160335222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'Information Handling System Differential Signalling Variable Bandwidth Interface' [patent_app_type] => utility [patent_app_number] => 14/708420 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4711 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14708420 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/708420
Information handling system differential signalling variable bandwidth interface selectively configuring single ended and differential signals May 10, 2015 Issued
Array ( [id] => 10357341 [patent_doc_number] => 20150242346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'SEMICONDUCTOR DATA PROCESSING DEVICE, TIME-TRIGGERED COMMUNICATION SYSTEM, AND COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/709081 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 13182 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14709081 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/709081
SEMICONDUCTOR DATA PROCESSING DEVICE, TIME-TRIGGERED COMMUNICATION SYSTEM, AND COMMUNICATION SYSTEM May 10, 2015 Abandoned
Array ( [id] => 10357530 [patent_doc_number] => 20150242535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'Content Searching Chip and System Based on Peripheral Component Interconnect Bus' [patent_app_type] => utility [patent_app_number] => 14/708791 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5332 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14708791 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/708791
Content searching chip based protocol conversion May 10, 2015 Issued
Array ( [id] => 11272670 [patent_doc_number] => 20160335217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'CIRCUIT, PARALLEL COMPUTING DEVICE, COMPUTER SYSTEM AND COMPUTER READABLE STORAGE MEDIUM' [patent_app_type] => utility [patent_app_number] => 14/708306 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3449 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14708306 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/708306
Circuit, parallel computing device, computer system and computer readable storage medium May 10, 2015 Issued
Array ( [id] => 12255977 [patent_doc_number] => 09928120 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-27 [patent_title] => 'Configuring logical unit number mapping for multiple SCSI target endpoints' [patent_app_type] => utility [patent_app_number] => 14/707587 [patent_app_country] => US [patent_app_date] => 2015-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7914 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14707587 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/707587
Configuring logical unit number mapping for multiple SCSI target endpoints May 7, 2015 Issued
Array ( [id] => 10665866 [patent_doc_number] => 20160012010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'METHOD, APPARATUS AND SYSTEM FOR MODULAR ON-DIE COHERENT INTERCONNECT' [patent_app_type] => utility [patent_app_number] => 14/707656 [patent_app_country] => US [patent_app_date] => 2015-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8832 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14707656 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/707656
Method, apparatus and system for modular on-die coherent interconnect for packetized communication May 7, 2015 Issued
Array ( [id] => 11252129 [patent_doc_number] => 09477632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Access proxy for accessing peripheral component interconnect express endpoint device, PCIe exchanger and computer system' [patent_app_type] => utility [patent_app_number] => 14/703328 [patent_app_country] => US [patent_app_date] => 2015-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10826 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14703328 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/703328
Access proxy for accessing peripheral component interconnect express endpoint device, PCIe exchanger and computer system May 3, 2015 Issued
Array ( [id] => 10550362 [patent_doc_number] => 09274987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Inter-component communication including slave component initiated transaction' [patent_app_type] => utility [patent_app_number] => 14/668028 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 7751 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14668028 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/668028
Inter-component communication including slave component initiated transaction Mar 24, 2015 Issued
Array ( [id] => 10327956 [patent_doc_number] => 20150212959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'INTER-COMPONENT COMMUNICATION INCLUDING SLAVE COMPONENT INITIATED TRANSACTION' [patent_app_type] => utility [patent_app_number] => 14/668013 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7753 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14668013 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/668013
Techniques for inter-component communication based on a state of a chip select pin Mar 24, 2015 Issued
Array ( [id] => 10314293 [patent_doc_number] => 20150199296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'INTER-COMPONENT COMMUNICATION INCLUDING SLAVE COMPONENT INITIATED TRANSACTION' [patent_app_type] => utility [patent_app_number] => 14/667997 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7749 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14667997 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/667997
Inter-component communication including posted and non-posted transactions Mar 24, 2015 Issued
Array ( [id] => 10314245 [patent_doc_number] => 20150199248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'INTER-COMPONENT COMMUNICATION INCLUDING SLAVE COMPONENT INITIATED TRANSACTION' [patent_app_type] => utility [patent_app_number] => 14/668114 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14668114 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/668114
Inter-component communication including posted and non-posted transactions Mar 24, 2015 Issued
Array ( [id] => 11816537 [patent_doc_number] => 09720484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Apparatus and method to reduce memory power consumption by inverting data' [patent_app_type] => utility [patent_app_number] => 14/666165 [patent_app_country] => US [patent_app_date] => 2015-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3597 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14666165 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/666165
Apparatus and method to reduce memory power consumption by inverting data Mar 22, 2015 Issued
Array ( [id] => 11769177 [patent_doc_number] => 09377837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'Apparatus and method for efficient scheduling of tasks' [patent_app_type] => utility [patent_app_number] => 14/663602 [patent_app_country] => US [patent_app_date] => 2015-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 10411 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14663602 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/663602
Apparatus and method for efficient scheduling of tasks Mar 19, 2015 Issued
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