Jorge L. Salazar Jr.

Array ( [id] => 11981864 [patent_doc_number] => 20170286018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'STORAGE SYSTEM AND STORAGE CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 15/509476 [patent_app_country] => US [patent_app_date] => 2014-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11027 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15509476 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9859781 [patent_doc_number] => 20150039799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'METHOD AND APPARATUS FOR SETTING WORKING MODE OF MULTI-PROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/519644 [patent_app_country] => US [patent_app_date] => 2014-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10024 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14519644 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10009730 [patent_doc_number] => 09053252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Storage expansion apparatus and server' [patent_app_type] => utility [patent_app_number] => 14/512790 [patent_app_country] => US [patent_app_date] => 2014-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 6353 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 390 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14512790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9814429 [patent_doc_number] => 20150026373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'Computer System Including CPU or Peripheral Bridge to Communicate Serial Bits of Peripheral Component Interconnect Bus Transaction and Low Voltage Differential Signal Channel to Convey the Serial Bits' [patent_app_type] => utility [patent_app_number] => 14/511093 [patent_app_country] => US [patent_app_date] => 2014-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 23882 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14511093 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10731843 [patent_doc_number] => 20160077993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'PORTABLE DEVICE AND CONTROL METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 14/488951 [patent_app_country] => US [patent_app_date] => 2014-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14488951 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10731842 [patent_doc_number] => 20160077992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'USB extension for lossy channel' [patent_app_type] => utility [patent_app_number] => 14/488388 [patent_app_country] => US [patent_app_date] => 2014-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3331 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14488388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11775227 [patent_doc_number] => 09384157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Intercomponent data communication' [patent_app_type] => utility [patent_app_number] => 14/484984 [patent_app_country] => US [patent_app_date] => 2014-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 22847 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14484984 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12114338 [patent_doc_number] => 09870333 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-01-16 [patent_title] => 'Instrumentation chassis including integrated accelerator module' [patent_app_type] => utility [patent_app_number] => 14/484597 [patent_app_country] => US [patent_app_date] => 2014-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14484597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10724434 [patent_doc_number] => 20160070582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'FREQUENCY AND POWER MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 14/479123 [patent_app_country] => US [patent_app_date] => 2014-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6602 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14479123 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10462144 [patent_doc_number] => 20150347159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'GENERIC PHYSICAL LOCATION CODES FOR VIRTUAL SYSTEM AND PARTITION CLONING' [patent_app_type] => utility [patent_app_number] => 14/476306 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5441 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14476306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10716793 [patent_doc_number] => 20160062940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'Safely Sharing USB Devices During PCI Passthrough Operation' [patent_app_type] => utility [patent_app_number] => 14/469791 [patent_app_country] => US [patent_app_date] => 2014-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14469791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10471033 [patent_doc_number] => 20150356050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'Interface Emulator using FIFOs' [patent_app_type] => utility [patent_app_number] => 14/459731 [patent_app_country] => US [patent_app_date] => 2014-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3669 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14459731 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13284715 [patent_doc_number] => 10153954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Inferring physical layer connection status of generic cables from planned single-end connection events [patent_app_type] => utility [patent_app_number] => 14/458974 [patent_app_country] => US [patent_app_date] => 2014-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10088 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14458974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11910234 [patent_doc_number] => 09779046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Electronic apparatus and port control method for locking downstream USB ports' [patent_app_type] => utility [patent_app_number] => 14/458817 [patent_app_country] => US [patent_app_date] => 2014-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3028 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14458817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11523555 [patent_doc_number] => 09606955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Embedded universal serial bus solutions' [patent_app_type] => utility [patent_app_number] => 14/457594 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 27454 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10941577 [patent_doc_number] => 20140344598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'Enabling A Non-Core Domain To Control Memory Bandwidth' [patent_app_type] => utility [patent_app_number] => 14/451807 [patent_app_country] => US [patent_app_date] => 2014-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10928054 [patent_doc_number] => 20140331074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-06 [patent_title] => 'TIME DIVISION MULTIPLEXED MULTIPORT MEMORY IMPLEMENTED USING SINGLE-PORT MEMORY ELEMENTS' [patent_app_type] => utility [patent_app_number] => 14/332006 [patent_app_country] => US [patent_app_date] => 2014-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14332006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11258535 [patent_doc_number] => 09483435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'USB transceiver' [patent_app_type] => utility [patent_app_number] => 14/324234 [patent_app_country] => US [patent_app_date] => 2014-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5103 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14324234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11875456 [patent_doc_number] => 09747229 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-29 [patent_title] => 'Self-describing data format for DMA in a non-volatile solid-state storage' [patent_app_type] => utility [patent_app_number] => 14/323894 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14323894 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11875454 [patent_doc_number] => 09747228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Caching systems and methods for execution within an NVDRAM environment' [patent_app_type] => utility [patent_app_number] => 14/323079 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4583 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14323079 [rel_patent_id] =>[rel_patent_doc_number] =>)