Joseph C. Nicely

Array ( [id] => 19484146 [patent_doc_number] => 20240332188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING BACK SIDE POWER SUPPLY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/742102 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19452853 [patent_doc_number] => 20240312983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => ELECTRONIC APPARATUS AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/671908 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19421044 [patent_doc_number] => 20240297168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/663100 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19384903 [patent_doc_number] => 20240274773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => DISPLAY PANEL MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/642363 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18642363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19654594 [patent_doc_number] => 12176395 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-12-24 [patent_title] => Structures for a laterally-diffused metal-oxide-semiconductor transistor [patent_app_type] => utility [patent_app_number] => 18/632506 [patent_app_country] => US [patent_app_date] => 2024-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19883436 [patent_doc_number] => 12269123 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-08 [patent_title] => Laser edge shaping for semiconductor wafers [patent_app_type] => utility [patent_app_number] => 18/628275 [patent_app_country] => US [patent_app_date] => 2024-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 35 [patent_no_of_words] => 20412 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18628275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19305946 [patent_doc_number] => 20240234526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => SILICIDE-LAYER-COUPLED DOPED PORTION OF ACTIVE REGION AND METHOD OF FABRICATING SAME [patent_app_type] => utility [patent_app_number] => 18/615255 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19671042 [patent_doc_number] => 12183814 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-12-31 [patent_title] => Multi-channel transistor [patent_app_type] => utility [patent_app_number] => 18/615615 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 4843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615615 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19821067 [patent_doc_number] => 20250079274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => POWER MODULE [patent_app_type] => utility [patent_app_number] => 18/611180 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4288 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18611180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19888339 [patent_doc_number] => 12274088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 18/608957 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3723 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20047049 [patent_doc_number] => 20250185271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/602879 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19484167 [patent_doc_number] => 20240332209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => METHOD FOR FORMING A SHIELDING LAYER ON A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/603185 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603185 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20104672 [patent_doc_number] => 20250234608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => Semiconductor Structure with Gate Isolation Layer and Manufacturing Method Thereof [patent_app_type] => utility [patent_app_number] => 18/603046 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19351517 [patent_doc_number] => 20240260481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/592553 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4257 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592553 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19806162 [patent_doc_number] => 20250072087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/583269 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18583269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19221686 [patent_doc_number] => 20240186390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/439290 [patent_app_country] => US [patent_app_date] => 2024-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7461 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19591877 [patent_doc_number] => 20240389434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/413727 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12608 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19176330 [patent_doc_number] => 20240162304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => FIELD EFFECT TRANSISTOR INCLUDING FIELD PLATES [patent_app_type] => utility [patent_app_number] => 18/407695 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407695 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20177574 [patent_doc_number] => 12396340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 18/395785 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 6786 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395785 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19507841 [patent_doc_number] => 12119271 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-10-15 [patent_title] => Backside gate contact, backside gate etch stop layer, and methods of forming same [patent_app_type] => utility [patent_app_number] => 18/545337 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 11499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18545337 [rel_patent_id] =>[rel_patent_doc_number] =>)