Search

Joseph C. Nicely

Examiner (ID: 16028, Phone: (571)270-3834 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1158
Issued Applications
887
Pending Applications
98
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17389429 [patent_doc_number] => 20220037281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => VIAS IN COMPOSITE IC CHIP STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/500824 [patent_app_country] => US [patent_app_date] => 2021-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17500824 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/500824
Vias in composite IC chip structures Oct 12, 2021 Issued
Array ( [id] => 19314549 [patent_doc_number] => 12040376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Semiconductor device and preparation method thereof [patent_app_type] => utility [patent_app_number] => 17/498873 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4729 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17498873 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/498873
Semiconductor device and preparation method thereof Oct 11, 2021 Issued
Array ( [id] => 19328978 [patent_doc_number] => 12046670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Semiconductor device having a gate contact over an active region [patent_app_type] => utility [patent_app_number] => 17/488235 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488235 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/488235
Semiconductor device having a gate contact over an active region Sep 27, 2021 Issued
Array ( [id] => 19079628 [patent_doc_number] => 11949009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Semiconductor die and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/482481 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4349 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482481 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/482481
Semiconductor die and method of manufacturing the same Sep 22, 2021 Issued
Array ( [id] => 18267550 [patent_doc_number] => 20230088792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/479223 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479223 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/479223
Semiconductor device Sep 19, 2021 Issued
Array ( [id] => 18874875 [patent_doc_number] => 11862698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/473622 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 46 [patent_no_of_words] => 10244 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473622 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473622
Semiconductor device and method of manufacturing semiconductor device Sep 12, 2021 Issued
Array ( [id] => 18243429 [patent_doc_number] => 20230075740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => GATE STACKS WITH MULTIPLE HIGH-K DIELECTRIC LAYERS [patent_app_type] => utility [patent_app_number] => 17/447109 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447109 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447109
Gate stacks with multiple high-k dielectric layers Sep 7, 2021 Issued
Array ( [id] => 18088773 [patent_doc_number] => 11538912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Method of forming semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/446834 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2605 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446834 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446834
Method of forming semiconductor structure Sep 2, 2021 Issued
Array ( [id] => 19030042 [patent_doc_number] => 11929411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Recessed access devices and methods of forming a recessed access devices [patent_app_type] => utility [patent_app_number] => 17/411643 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 5576 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411643 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411643
Recessed access devices and methods of forming a recessed access devices Aug 24, 2021 Issued
Array ( [id] => 18481205 [patent_doc_number] => 11694960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Bridge interconnection with layered interconnect structures [patent_app_type] => utility [patent_app_number] => 17/410716 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8437 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410716 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410716
Bridge interconnection with layered interconnect structures Aug 23, 2021 Issued
Array ( [id] => 17278042 [patent_doc_number] => 20210384240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => IMAGE SENSING DEVICE [patent_app_type] => utility [patent_app_number] => 17/410186 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410186 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410186
Image sensing device Aug 23, 2021 Issued
Array ( [id] => 18549825 [patent_doc_number] => 11723197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Semiconductor structure of split gate flash memory cell [patent_app_type] => utility [patent_app_number] => 17/409146 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8176 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409146
Semiconductor structure of split gate flash memory cell Aug 22, 2021 Issued
Array ( [id] => 17708966 [patent_doc_number] => 20220208974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/445636 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/445636
Method for manufacturing semiconductor structure and semiconductor structure Aug 22, 2021 Issued
Array ( [id] => 17708603 [patent_doc_number] => 20220208611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => Semiconductor Structure and Forming Method Thereof [patent_app_type] => utility [patent_app_number] => 17/406592 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406592 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406592
Semiconductor structure and forming method thereof Aug 18, 2021 Issued
Array ( [id] => 18857586 [patent_doc_number] => 11855183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/404087 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5726 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404087 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404087
Method for manufacturing semiconductor device Aug 16, 2021 Issued
Array ( [id] => 18891188 [patent_doc_number] => 11869967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Bottom source trench MOSFET with shield electrode [patent_app_type] => utility [patent_app_number] => 17/401183 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 6475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401183 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/401183
Bottom source trench MOSFET with shield electrode Aug 11, 2021 Issued
Array ( [id] => 17373958 [patent_doc_number] => 20220029010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => INTEGRATION OF A SCHOTTKY DIODE WITH A MOSFET [patent_app_type] => utility [patent_app_number] => 17/444817 [patent_app_country] => US [patent_app_date] => 2021-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444817 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/444817
Integration of a Schottky diode with a MOSFET Aug 9, 2021 Issued
Array ( [id] => 17247308 [patent_doc_number] => 20210367053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 17/397099 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397099 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397099
Semiconductor devices Aug 8, 2021 Issued
Array ( [id] => 17676987 [patent_doc_number] => 20220190154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/395070 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 497 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395070 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395070
Semiconductor device Aug 4, 2021 Issued
Array ( [id] => 17403077 [patent_doc_number] => 20220045168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => INSULATED TRENCH GATES WITH DOPANTS IMPLANTED THROUGH GATE OXIDE [patent_app_type] => utility [patent_app_number] => 17/388442 [patent_app_country] => US [patent_app_date] => 2021-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17388442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/388442
Insulated trench gates with dopants implanted through gate oxide Jul 28, 2021 Issued
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