Search

Joseph C. Nicely

Examiner (ID: 10544, Phone: (571)270-3834 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1132
Issued Applications
874
Pending Applications
108
Abandoned Applications
188

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18481205 [patent_doc_number] => 11694960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Bridge interconnection with layered interconnect structures [patent_app_type] => utility [patent_app_number] => 17/410716 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8437 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410716 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410716
Bridge interconnection with layered interconnect structures Aug 23, 2021 Issued
Array ( [id] => 17708966 [patent_doc_number] => 20220208974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/445636 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/445636
Method for manufacturing semiconductor structure and semiconductor structure Aug 22, 2021 Issued
Array ( [id] => 18549825 [patent_doc_number] => 11723197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Semiconductor structure of split gate flash memory cell [patent_app_type] => utility [patent_app_number] => 17/409146 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8176 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409146
Semiconductor structure of split gate flash memory cell Aug 22, 2021 Issued
Array ( [id] => 17708603 [patent_doc_number] => 20220208611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => Semiconductor Structure and Forming Method Thereof [patent_app_type] => utility [patent_app_number] => 17/406592 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406592 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406592
Semiconductor structure and forming method thereof Aug 18, 2021 Issued
Array ( [id] => 18857586 [patent_doc_number] => 11855183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/404087 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5726 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404087 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404087
Method for manufacturing semiconductor device Aug 16, 2021 Issued
Array ( [id] => 18891188 [patent_doc_number] => 11869967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Bottom source trench MOSFET with shield electrode [patent_app_type] => utility [patent_app_number] => 17/401183 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 6475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401183 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/401183
Bottom source trench MOSFET with shield electrode Aug 11, 2021 Issued
Array ( [id] => 17373958 [patent_doc_number] => 20220029010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => INTEGRATION OF A SCHOTTKY DIODE WITH A MOSFET [patent_app_type] => utility [patent_app_number] => 17/444817 [patent_app_country] => US [patent_app_date] => 2021-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444817 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/444817
Integration of a Schottky diode with a MOSFET Aug 9, 2021 Issued
Array ( [id] => 17247308 [patent_doc_number] => 20210367053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 17/397099 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397099 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397099
Semiconductor devices Aug 8, 2021 Issued
Array ( [id] => 17676987 [patent_doc_number] => 20220190154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/395070 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 497 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395070 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395070
Semiconductor device Aug 4, 2021 Issued
Array ( [id] => 17403077 [patent_doc_number] => 20220045168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => INSULATED TRENCH GATES WITH DOPANTS IMPLANTED THROUGH GATE OXIDE [patent_app_type] => utility [patent_app_number] => 17/388442 [patent_app_country] => US [patent_app_date] => 2021-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17388442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/388442
Insulated trench gates with dopants implanted through gate oxide Jul 28, 2021 Issued
Array ( [id] => 17232391 [patent_doc_number] => 20210358948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/387939 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387939 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387939
Three-dimensional memory device and manufacturing method thereof Jul 27, 2021 Issued
Array ( [id] => 18219672 [patent_doc_number] => 11594622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Semiconductor device and method of controlling same [patent_app_type] => utility [patent_app_number] => 17/383837 [patent_app_country] => US [patent_app_date] => 2021-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7709 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 442 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17383837 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/383837
Semiconductor device and method of controlling same Jul 22, 2021 Issued
Array ( [id] => 17373676 [patent_doc_number] => 20220028728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => METHOD FOR MANUFACTURING A MICROELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/443117 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17443117 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/443117
Method for manufacturing a microelectronic device Jul 20, 2021 Issued
Array ( [id] => 18593490 [patent_doc_number] => 11742402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/381191 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3671 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381191 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381191
Semiconductor structure and manufacturing method thereof Jul 20, 2021 Issued
Array ( [id] => 17389636 [patent_doc_number] => 20220037488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/375950 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375950 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375950
Semiconductor device Jul 13, 2021 Issued
Array ( [id] => 19063071 [patent_doc_number] => 11942320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Method of manufacturing semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/602873 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17602873 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/602873
Method of manufacturing semiconductor structure Jul 11, 2021 Issued
Array ( [id] => 18840295 [patent_doc_number] => 11848378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Split-gate trench power MOSFET with self-aligned poly-to-poly isolation [patent_app_type] => utility [patent_app_number] => 17/373198 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 4138 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17373198 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/373198
Split-gate trench power MOSFET with self-aligned poly-to-poly isolation Jul 11, 2021 Issued
Array ( [id] => 18874874 [patent_doc_number] => 11862697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Method for manufacturing buried gate and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/371184 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5248 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371184 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371184
Method for manufacturing buried gate and method for manufacturing semiconductor device Jul 8, 2021 Issued
Array ( [id] => 18804476 [patent_doc_number] => 11837640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Transistors with stepped contact via structures and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/362121 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 14205 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17362121 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/362121
Transistors with stepped contact via structures and methods of forming the same Jun 28, 2021 Issued
Array ( [id] => 18563172 [patent_doc_number] => 11728427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Power semiconductor device having a strain-inducing material embedded in an electrode [patent_app_type] => utility [patent_app_number] => 17/353119 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 27 [patent_no_of_words] => 7830 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353119 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353119
Power semiconductor device having a strain-inducing material embedded in an electrode Jun 20, 2021 Issued
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