Search

Joseph C. Nicely

Examiner (ID: 10544, Phone: (571)270-3834 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1132
Issued Applications
874
Pending Applications
108
Abandoned Applications
188

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18608251 [patent_doc_number] => 11749730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Semiconductor device with contact structure and method for preparing the same [patent_app_type] => utility [patent_app_number] => 17/347136 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9100 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347136 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/347136
Semiconductor device with contact structure and method for preparing the same Jun 13, 2021 Issued
Array ( [id] => 17130277 [patent_doc_number] => 20210305046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => FIELD EFFECT TRANSISTOR USING TRANSITION METAL DICHALCOGENIDE AND A METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/346712 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346712 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/346712
Field effect transistor using transition metal dichalcogenide and a method for forming the same Jun 13, 2021 Issued
Array ( [id] => 18841550 [patent_doc_number] => 11849648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Semiconductor device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 17/341417 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4389 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341417
Semiconductor device and method for fabricating the same Jun 7, 2021 Issued
Array ( [id] => 18874736 [patent_doc_number] => 11862559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Semiconductor structures and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/337962 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 54 [patent_no_of_words] => 10218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337962 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337962
Semiconductor structures and methods of forming the same Jun 2, 2021 Issued
Array ( [id] => 18040371 [patent_doc_number] => 20220384588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => SEMICONDUCTOR STRUCTURES FOR GALVANIC ISOLATION [patent_app_type] => utility [patent_app_number] => 17/335091 [patent_app_country] => US [patent_app_date] => 2021-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17335091 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/335091
Semiconductor structures for galvanic isolation May 31, 2021 Issued
Array ( [id] => 17956333 [patent_doc_number] => 11482446 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-10-25 [patent_title] => Method for manufacturing semiconductor device and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/599758 [patent_app_country] => US [patent_app_date] => 2021-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 5223 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17599758 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/599758
Method for manufacturing semiconductor device and semiconductor device May 31, 2021 Issued
Array ( [id] => 18047934 [patent_doc_number] => 11521892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Method for fabricating a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/334104 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6835 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/334104
Method for fabricating a semiconductor device May 27, 2021 Issued
Array ( [id] => 18024304 [patent_doc_number] => 20220375803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => ARRAY SUBSTRATE, DISPLAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/764256 [patent_app_country] => US [patent_app_date] => 2021-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4463 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17764256 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/764256
Array substrate, display panel and manufacturing method thereof May 26, 2021 Issued
Array ( [id] => 17100441 [patent_doc_number] => 20210288232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => LIGHT-EMITTING DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY MODULE USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/332378 [patent_app_country] => US [patent_app_date] => 2021-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20077 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17332378 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/332378
Light-emitting device, manufacturing method thereof and display module using the same May 26, 2021 Issued
Array ( [id] => 18156343 [patent_doc_number] => 11569338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/331604 [patent_app_country] => US [patent_app_date] => 2021-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 11832 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17331604 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/331604
Display device May 25, 2021 Issued
Array ( [id] => 18357937 [patent_doc_number] => 11646344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Method for making super junction device [patent_app_type] => utility [patent_app_number] => 17/329531 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 15696 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329531 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329531
Method for making super junction device May 24, 2021 Issued
Array ( [id] => 18774307 [patent_doc_number] => 20230369138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND SHORT CIRCUIT REPAIR METHOD [patent_app_type] => utility [patent_app_number] => 17/425675 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17425675 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/425675
Array substrate, manufacturing method thereof, and short circuit repair method May 23, 2021 Issued
Array ( [id] => 18387439 [patent_doc_number] => 11658234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Field effect transistor with enhanced reliability [patent_app_type] => utility [patent_app_number] => 17/325576 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 12080 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17325576 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/325576
Field effect transistor with enhanced reliability May 19, 2021 Issued
Array ( [id] => 18608247 [patent_doc_number] => 11749726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Field effect transistor with source-connected field plate [patent_app_type] => utility [patent_app_number] => 17/325666 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 33 [patent_no_of_words] => 10205 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17325666 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/325666
Field effect transistor with source-connected field plate May 19, 2021 Issued
Array ( [id] => 17463848 [patent_doc_number] => 20220077154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => SEMICONDUCTOR DEVICES HAVING BURIED GATES [patent_app_type] => utility [patent_app_number] => 17/318563 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318563 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318563
Semiconductor devices having buried gates May 11, 2021 Issued
Array ( [id] => 18008621 [patent_doc_number] => 20220367388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => SEMICONDUCTOR DOPED REGION WITH BIASED ISOLATED MEMBERS [patent_app_type] => utility [patent_app_number] => 17/318556 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318556
Semiconductor doped region with biased isolated members May 11, 2021 Issued
Array ( [id] => 17303130 [patent_doc_number] => 20210398969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/314457 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314457 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314457
Semiconductor device and method of manufacturing the same May 6, 2021 Issued
Array ( [id] => 18120578 [patent_doc_number] => 11551977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Methods for improvement of photoresist patterning profile [patent_app_type] => utility [patent_app_number] => 17/315201 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315201 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315201
Methods for improvement of photoresist patterning profile May 6, 2021 Issued
Array ( [id] => 18263263 [patent_doc_number] => 11610972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Technique for reducing gate induced drain leakage in DRAM cells [patent_app_type] => utility [patent_app_number] => 17/314275 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3396 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314275 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314275
Technique for reducing gate induced drain leakage in DRAM cells May 6, 2021 Issued
Array ( [id] => 17040906 [patent_doc_number] => 20210257542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/308057 [patent_app_country] => US [patent_app_date] => 2021-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/308057
Semiconductor device and method for fabricating the same May 4, 2021 Issued
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