Search

Joseph C. Nicely

Examiner (ID: 16028, Phone: (571)270-3834 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1158
Issued Applications
887
Pending Applications
98
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17152636 [patent_doc_number] => 11145727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Semiconductor structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/667893 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3017 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667893 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667893
Semiconductor structure and method of forming the same Oct 28, 2019 Issued
Array ( [id] => 16731245 [patent_doc_number] => 20210098393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => SYSTEMS AND METHODS FOR ELECTRICAL CHARGE DISSIPATION [patent_app_type] => utility [patent_app_number] => 16/662041 [patent_app_country] => US [patent_app_date] => 2019-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16662041 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/662041
SYSTEMS AND METHODS FOR ELECTRICAL CHARGE DISSIPATION Oct 23, 2019 Abandoned
Array ( [id] => 16796309 [patent_doc_number] => 20210126126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => SEMICONDUCTOR DEVICE WITH DOPED REGION ADJACENT ISOLATION STRUCTURE IN EXTENSION REGION [patent_app_type] => utility [patent_app_number] => 16/662276 [patent_app_country] => US [patent_app_date] => 2019-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2898 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16662276 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/662276
Semiconductor device with doped region adjacent isolation structure in extension region Oct 23, 2019 Issued
Array ( [id] => 15462055 [patent_doc_number] => 20200043852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => BRIDGE INTERCONNECTION WITH LAYERED INTERCONNECT STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/596620 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16596620 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/596620
Bridge interconnection with layered interconnect structures Oct 7, 2019 Issued
Array ( [id] => 17289069 [patent_doc_number] => 11205630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Vias in composite IC chip structures [patent_app_type] => utility [patent_app_number] => 16/586158 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 33 [patent_no_of_words] => 15816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586158 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586158
Vias in composite IC chip structures Sep 26, 2019 Issued
Array ( [id] => 15841295 [patent_doc_number] => 20200135930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => CRYSTALLINE SEMICONDUCTOR LAYER FORMED IN BEOL PROCESSES [patent_app_type] => utility [patent_app_number] => 16/585571 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585571 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585571
Crystalline semiconductor layer formed in BEOL processes Sep 26, 2019 Issued
Array ( [id] => 17289094 [patent_doc_number] => 11205655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Method for manufacturing semiconductor device including fin-structured transistor [patent_app_type] => utility [patent_app_number] => 16/585802 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 13266 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585802 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585802
Method for manufacturing semiconductor device including fin-structured transistor Sep 26, 2019 Issued
Array ( [id] => 16835403 [patent_doc_number] => 11011665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Thin film transistor array substrate for high-resolution digital X-ray detector and high-resolution digital X-ray detector including the same [patent_app_type] => utility [patent_app_number] => 16/585520 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 10790 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585520 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585520
Thin film transistor array substrate for high-resolution digital X-ray detector and high-resolution digital X-ray detector including the same Sep 26, 2019 Issued
Array ( [id] => 16731479 [patent_doc_number] => 20210098627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => Structure and Method for Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 16/585636 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585636 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585636
Structure and method for semiconductor devices Sep 26, 2019 Issued
Array ( [id] => 16835155 [patent_doc_number] => 11011414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Multi-barrier deposition for air gap formation [patent_app_type] => utility [patent_app_number] => 16/580750 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5789 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580750 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/580750
Multi-barrier deposition for air gap formation Sep 23, 2019 Issued
Array ( [id] => 16803400 [patent_doc_number] => 10998355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Semiconductor device and electronic apparatus [patent_app_type] => utility [patent_app_number] => 16/574517 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8311 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574517 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574517
Semiconductor device and electronic apparatus Sep 17, 2019 Issued
Array ( [id] => 16760009 [patent_doc_number] => 10978567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Gate stack treatment for ferroelectric transistors [patent_app_type] => utility [patent_app_number] => 16/573498 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 6277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573498 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573498
Gate stack treatment for ferroelectric transistors Sep 16, 2019 Issued
Array ( [id] => 15775973 [patent_doc_number] => 20200119004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => MULTI-GATE DEVICE AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/573378 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573378 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573378
Multi-gate device and related methods Sep 16, 2019 Issued
Array ( [id] => 16332561 [patent_doc_number] => 20200303527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SAME [patent_app_type] => utility [patent_app_number] => 16/573593 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7695 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573593 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573593
Semiconductor device and method of controlling same Sep 16, 2019 Issued
Array ( [id] => 16715668 [patent_doc_number] => 20210082815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING BACK SIDE POWER SUPPLY CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/573459 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573459 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573459
Semiconductor device including back side power supply circuit Sep 16, 2019 Issued
Array ( [id] => 15351595 [patent_doc_number] => 20200013689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => PACKAGING STRUCTURES WITH IMPROVED ADHESION AND STRENGTH [patent_app_type] => utility [patent_app_number] => 16/573344 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573344 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573344
Packaging structures with improved adhesion and strength Sep 16, 2019 Issued
Array ( [id] => 17048039 [patent_doc_number] => 11101229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Semiconductor device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/573549 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6813 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573549
Semiconductor device and method for fabricating the same Sep 16, 2019 Issued
Array ( [id] => 16819911 [patent_doc_number] => 11004749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/573485 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 7928 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573485 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573485
Semiconductor device and method of manufacturing the same Sep 16, 2019 Issued
Array ( [id] => 17166452 [patent_doc_number] => 11152565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Memory device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/573615 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 45 [patent_no_of_words] => 11173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573615 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573615
Memory device and manufacturing method thereof Sep 16, 2019 Issued
Array ( [id] => 16356577 [patent_doc_number] => 10797095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Image sensors and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/570142 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 9907 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570142 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570142
Image sensors and methods of forming the same Sep 12, 2019 Issued
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