Search

Joseph C. Nicely

Examiner (ID: 16028, Phone: (571)270-3834 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1158
Issued Applications
887
Pending Applications
98
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19337111 [patent_doc_number] => 20240251541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => MEMORY DEVICE, METHOD, LAYOUT, AND SYSTEM [patent_app_type] => utility [patent_app_number] => 18/325861 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18325861 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/325861
Memory device, method, layout, and system May 29, 2023 Issued
Array ( [id] => 20933027 [patent_doc_number] => 12727231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-01 [patent_title] => Semiconductor device and methods of manufacturing the semiconductor device [patent_app_type] => utility [patent_app_number] => 18/321776 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 1136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18321776 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/321776
SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICE May 22, 2023 Pending
Array ( [id] => 19546326 [patent_doc_number] => 20240363362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/201163 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18201163 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/201163
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE May 22, 2023 Pending
Array ( [id] => 18789601 [patent_doc_number] => 20230378295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/197909 [patent_app_country] => US [patent_app_date] => 2023-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18197909 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/197909
TRANSISTOR May 15, 2023 Pending
Array ( [id] => 18615974 [patent_doc_number] => 20230282713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => TRENCH TYPE POWER DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/316247 [patent_app_country] => US [patent_app_date] => 2023-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18316247 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/316247
TRENCH TYPE POWER DEVICE AND MANUFACTURING METHOD THEREOF May 11, 2023 Pending
Array ( [id] => 19546663 [patent_doc_number] => 20240363699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => SEMICONDUCTOR DEVICE HAVING A TRENCH STRUCTURE WITH LOWER, UPPER, AND INTERMEDIARY SECTIONS AND METHOD OF PRODUCING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/140253 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140253 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/140253
SEMICONDUCTOR DEVICE HAVING A TRENCH STRUCTURE WITH LOWER, UPPER, AND INTERMEDIARY SECTIONS AND METHOD OF PRODUCING THE SEMICONDUCTOR DEVICE Apr 26, 2023 Pending
Array ( [id] => 18898653 [patent_doc_number] => 20240014138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => BRIDGE INTERCONNECTION WITH LAYERED INTERCONNECT STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/139862 [patent_app_country] => US [patent_app_date] => 2023-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8461 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139862 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/139862
Bridge interconnection with layered interconnect structures Apr 25, 2023 Issued
Array ( [id] => 19314444 [patent_doc_number] => 12040270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Semiconductor device including back side power supply circuit [patent_app_type] => utility [patent_app_number] => 18/138528 [patent_app_country] => US [patent_app_date] => 2023-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 40 [patent_no_of_words] => 8742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18138528 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/138528
Semiconductor device including back side power supply circuit Apr 23, 2023 Issued
Array ( [id] => 19016483 [patent_doc_number] => 11923428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Fin field-effect transistor and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/137257 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18137257 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/137257
Fin field-effect transistor and method of forming the same Apr 19, 2023 Issued
Array ( [id] => 19532004 [patent_doc_number] => 20240355906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => STI LOSS MITIGATION BY RADICAL OXIDATION TREATMENT [patent_app_type] => utility [patent_app_number] => 18/303989 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13512 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18303989 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/303989
STI LOSS MITIGATION BY RADICAL OXIDATION TREATMENT Apr 19, 2023 Pending
Array ( [id] => 18907929 [patent_doc_number] => 20240023414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => DISPLAY DEVICE AND METHOD OF PROVIDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/302905 [patent_app_country] => US [patent_app_date] => 2023-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18302905 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/302905
DISPLAY DEVICE AND METHOD OF PROVIDING THE SAME Apr 18, 2023 Pending
Array ( [id] => 18713001 [patent_doc_number] => 20230335634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => TRENCH-GATE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/299820 [patent_app_country] => US [patent_app_date] => 2023-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299820 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/299820
TRENCH-GATE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Apr 12, 2023 Pending
Array ( [id] => 18712988 [patent_doc_number] => 20230335621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => METHOD FOR MANUFACTURING TRENCH-TYPE MOSFET [patent_app_type] => utility [patent_app_number] => 18/299245 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5605 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299245 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/299245
METHOD FOR MANUFACTURING TRENCH-TYPE MOSFET Apr 11, 2023 Pending
Array ( [id] => 19525636 [patent_doc_number] => 12127394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Semiconductor devices having buried gates [patent_app_type] => utility [patent_app_number] => 18/298230 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 6373 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298230 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/298230
Semiconductor devices having buried gates Apr 9, 2023 Issued
Array ( [id] => 18533367 [patent_doc_number] => 20230238443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => Gate Stack Treatment For Ferroelectric Transistors [patent_app_type] => utility [patent_app_number] => 18/129961 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6335 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18129961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/129961
Gate stack treatment for ferroelectric transistors Apr 2, 2023 Issued
Array ( [id] => 19199206 [patent_doc_number] => 11996455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => P-type dipole for P-FET [patent_app_type] => utility [patent_app_number] => 18/130201 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7781 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18130201 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/130201
P-type dipole for P-FET Apr 2, 2023 Issued
Array ( [id] => 18943410 [patent_doc_number] => 20240038549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/125958 [patent_app_country] => US [patent_app_date] => 2023-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18125958 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/125958
Method of manufacturing semiconductor package Mar 23, 2023 Issued
Array ( [id] => 19101057 [patent_doc_number] => 20240120285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SUBSTRATE HAVING A DIE POSITION MARK AND A SEMICONDUCTOR DIE STACK STRUCTURE INCLUDING SEMICONDUCTOR DIES STACKED ON THE SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/184559 [patent_app_country] => US [patent_app_date] => 2023-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184559 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/184559
Substrate having a die position mark and a semiconductor die stack structure including semiconductor dies stacked on the substrate Mar 14, 2023 Issued
Array ( [id] => 19054907 [patent_doc_number] => 20240096876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/178816 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18178816 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/178816
SEMICONDUCTOR DEVICE Mar 5, 2023 Abandoned
Array ( [id] => 18615951 [patent_doc_number] => 20230282690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/179197 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179197 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/179197
SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE Mar 5, 2023 Pending
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