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Joseph Clawson Jr.

Examiner (ID: 4508)

Most Active Art Unit
2503
Art Unit(s)
2504, 2503, 2312, 2303, 2818, 2511, 2508, 2305
Total Applications
990
Issued Applications
627
Pending Applications
15
Abandoned Applications
348
Applications
StatisticsSubscription-Only

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2766734 [patent_doc_number] => 05043944 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-27 [patent_title] => 'Semiconductor memory device with improved output to differential data lines' [patent_app_type] => 1 [patent_app_number] => 7/611056 [patent_app_country] => US [patent_app_date] => 1990-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 40 [patent_no_of_words] => 7027 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/043/05043944.pdf [firstpage_image] =>[orig_patent_app_number] => 611056 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/611056 		Semiconductor memory device with improved output to differential data lines Nov 8, 1990 Issued
07/611071 SEMICONDUCTOR MEMORY DEVICE Nov 8, 1990 Abandoned
Array ( [id] => 2977855 [patent_doc_number] => 05202857 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-13 [patent_title] => 'System for generating memory timing and reducing memory access time' [patent_app_type] => 1 [patent_app_number] => 7/610424 [patent_app_country] => US [patent_app_date] => 1990-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2427 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 591 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/202/05202857.pdf [firstpage_image] =>[orig_patent_app_number] => 610424 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/610424 		System for generating memory timing and reducing memory access time Nov 6, 1990 Issued
Array ( [id] => 2858664 [patent_doc_number] => 05111429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Single event upset hardening CMOS memory circuit' [patent_app_type] => 1 [patent_app_number] => 7/609583 [patent_app_country] => US [patent_app_date] => 1990-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4403 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111429.pdf [firstpage_image] =>[orig_patent_app_number] => 609583 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/609583 		Single event upset hardening CMOS memory circuit Nov 5, 1990 Issued
07/608732 SEMICONDUCTOR MEMORY DEVICE HAVING CELL ARRAY DIVIDED INTO A PLURALITY OF CELL BLOCKS Nov 4, 1990 Abandoned
Array ( [id] => 2836428 [patent_doc_number] => 05117392 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/608226 [patent_app_country] => US [patent_app_date] => 1990-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5685 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/117/05117392.pdf [firstpage_image] =>[orig_patent_app_number] => 608226 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/608226 		Non-volatile semiconductor memory device Nov 1, 1990 Issued
Array ( [id] => 2858705 [patent_doc_number] => 05111431 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Register forwarding multi-port register file' [patent_app_type] => 1 [patent_app_number] => 7/608294 [patent_app_country] => US [patent_app_date] => 1990-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2981 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111431.pdf [firstpage_image] =>[orig_patent_app_number] => 608294 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/608294 		Register forwarding multi-port register file Nov 1, 1990 Issued
Array ( [id] => 2985231 [patent_doc_number] => 05208771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-04 [patent_title] => 'Semiconductor memory apparatus' [patent_app_type] => 1 [patent_app_number] => 7/605314 [patent_app_country] => US [patent_app_date] => 1990-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6514 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/208/05208771.pdf [firstpage_image] =>[orig_patent_app_number] => 605314 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/605314 		Semiconductor memory apparatus Oct 29, 1990 Issued
07/597674 DRAM DEVICE COMPRISING A STACKED TYPE CAPACITOR AND A METHOD OF MANUFACTURING THEREOF Oct 16, 1990 Abandoned
Array ( [id] => 2770161 [patent_doc_number] => 05060195 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Hot electron programmable, tunnel electron erasable contactless EEPROM' [patent_app_type] => 1 [patent_app_number] => 7/595521 [patent_app_country] => US [patent_app_date] => 1990-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7306 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/060/05060195.pdf [firstpage_image] =>[orig_patent_app_number] => 595521 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/595521 		Hot electron programmable, tunnel electron erasable contactless EEPROM Oct 10, 1990 Issued
07/594531 MEMORY WITH I/O MAPPABLE REDUNDANT COLUMNS Oct 8, 1990 Abandoned
Array ( [id] => 2790732 [patent_doc_number] => 05088065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-11 [patent_title] => 'Static type semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/593584 [patent_app_country] => US [patent_app_date] => 1990-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 30 [patent_no_of_words] => 5810 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/088/05088065.pdf [firstpage_image] =>[orig_patent_app_number] => 593584 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/593584 		Static type semiconductor memory Oct 4, 1990 Issued
Array ( [id] => 2725287 [patent_doc_number] => 05053992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Prevention of inspection of secret data stored in encapsulated integrated circuit chip' [patent_app_type] => 1 [patent_app_number] => 7/592650 [patent_app_country] => US [patent_app_date] => 1990-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5014 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053992.pdf [firstpage_image] =>[orig_patent_app_number] => 592650 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/592650 		Prevention of inspection of secret data stored in encapsulated integrated circuit chip Oct 3, 1990 Issued
07/592109 STACKED DELTA CELL CAPACITOR Oct 2, 1990 Abandoned
07/589675 PROCESS OF STORING ANALOG QUANTITIES AND DEVICE FOR THE IMPLEMENTATION THEREOF Sep 27, 1990 Abandoned
07/586155 SEMICONDUCTOR MEMORY APPARATUS Sep 20, 1990 Abandoned
07/585239 SEMICONDUCTOR MEMORY DEVICE HAVING A REDUNDANCY CAPABILITY Sep 19, 1990 Abandoned
07/585811 TRIPLE POLYSILICON FLASH EPROM DEVICE Sep 19, 1990 Abandoned
07/584818 SENSE AMPLIFIER CONTROL SYSTEM FOR FERROELECTRIC MEMORIES Sep 18, 1990 Abandoned
Array ( [id] => 2757975 [patent_doc_number] => 05038327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-06 [patent_title] => 'Decoder circuit of erasable programmable read only memory for avoiding erroneous operation caused by parasitic capacitors' [patent_app_type] => 1 [patent_app_number] => 7/584956 [patent_app_country] => US [patent_app_date] => 1990-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6699 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/038/05038327.pdf [firstpage_image] =>[orig_patent_app_number] => 584956 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/584956 		Decoder circuit of erasable programmable read only memory for avoiding erroneous operation caused by parasitic capacitors Sep 17, 1990 Issued
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