Search

Joseph D. Manoskey

Examiner (ID: 8767, Phone: (571)272-3648 , Office: P/2113 )

Most Active Art Unit
2113
Art Unit(s)
2184, 2113
Total Applications
1144
Issued Applications
1008
Pending Applications
58
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20290100 [patent_doc_number] => 20250315343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => METHODS AND DEVICES FOR ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 19/244826 [patent_app_country] => US [patent_app_date] => 2025-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 42383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19244826 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/244826
METHODS AND DEVICES FOR ERROR CORRECTION Jun 19, 2025 Pending
Array ( [id] => 20365939 [patent_doc_number] => 20250355751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => ONLINE MULTI-MODALITY ROOT CAUSE ANALYSIS [patent_app_type] => utility [patent_app_number] => 19/202181 [patent_app_country] => US [patent_app_date] => 2025-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19202181 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/202181
ONLINE MULTI-MODALITY ROOT CAUSE ANALYSIS May 7, 2025 Pending
Array ( [id] => 20709537 [patent_doc_number] => 20260133871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-05-14 [patent_title] => INTELLIGENT OPEN TELEMETRY EXCEPTION PROCESSING AND REPORTING [patent_app_type] => utility [patent_app_number] => 19/191332 [patent_app_country] => US [patent_app_date] => 2025-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19191332 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/191332
INTELLIGENT OPEN TELEMETRY EXCEPTION PROCESSING AND REPORTING Apr 27, 2025 Pending
Array ( [id] => 20474937 [patent_doc_number] => 20260017158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-15 [patent_title] => MANAGEMENT APPARATUS, PATH SETTING METHOD, AND PATH SETTING PROGRAM [patent_app_type] => utility [patent_app_number] => 19/077466 [patent_app_country] => US [patent_app_date] => 2025-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7128 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19077466 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/077466
MANAGEMENT APPARATUS, PATH SETTING METHOD, AND PATH SETTING PROGRAM Mar 11, 2025 Pending
Array ( [id] => 20221656 [patent_doc_number] => 20250284587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => METHOD AND DEVICE FOR CORRECTING ERRORS IN RESISTIVE MEMORIES OR FLASH MEMORIES [patent_app_type] => utility [patent_app_number] => 19/071552 [patent_app_country] => US [patent_app_date] => 2025-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19071552 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/071552
METHOD AND DEVICE FOR CORRECTING ERRORS IN RESISTIVE MEMORIES OR FLASH MEMORIES Mar 4, 2025 Pending
Array ( [id] => 20052074 [patent_doc_number] => 20250190296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => TechWiki - Computer Diagnostics using Quantum Annealing and Blockchain Framework [patent_app_type] => utility [patent_app_number] => 19/055815 [patent_app_country] => US [patent_app_date] => 2025-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19055815 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/055815
TechWiki - Computer Diagnostics using Quantum Annealing and Blockchain Framework Feb 17, 2025 Pending
Array ( [id] => 20034981 [patent_doc_number] => 20250173203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => EARLY WARNING MECHANISM ON DATABASE MANAGEMENT SYSTEM WORKLOAD [patent_app_type] => utility [patent_app_number] => 19/042061 [patent_app_country] => US [patent_app_date] => 2025-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 506 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19042061 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/042061
EARLY WARNING MECHANISM ON DATABASE MANAGEMENT SYSTEM WORKLOAD Jan 30, 2025 Pending
Array ( [id] => 20587194 [patent_doc_number] => 20260072789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => MAGNETIC DISK DEVICE [patent_app_type] => utility [patent_app_number] => 19/033361 [patent_app_country] => US [patent_app_date] => 2025-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 764 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19033361 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/033361
MAGNETIC DISK DEVICE Jan 20, 2025 Pending
Array ( [id] => 19864640 [patent_doc_number] => 20250103426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => Memory Sparing to Improve Chip Reliability [patent_app_type] => utility [patent_app_number] => 18/969998 [patent_app_country] => US [patent_app_date] => 2024-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18969998 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/969998
Memory Sparing to Improve Chip Reliability Dec 4, 2024 Pending
Array ( [id] => 20709530 [patent_doc_number] => 20260133864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-05-14 [patent_title] => SYSTEM AND METHOD FOR DETECTING REAL-TIME ANOMALIES IN TRANSMISSION PATH OF RESOURCES WITHIN AN ENTITY NETWORK VIA DNA COMPUTING [patent_app_type] => utility [patent_app_number] => 18/946824 [patent_app_country] => US [patent_app_date] => 2024-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18946824 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/946824
SYSTEM AND METHOD FOR DETECTING REAL-TIME ANOMALIES IN TRANSMISSION PATH OF RESOURCES WITHIN AN ENTITY NETWORK VIA DNA COMPUTING Nov 12, 2024 Pending
Array ( [id] => 19787345 [patent_doc_number] => 20250061024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => PROBABILISTIC ERROR CORRECTION IN FLASH-BASED STORAGE SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/938029 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 41739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18938029 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/938029
PROBABILISTIC ERROR CORRECTION IN FLASH-BASED STORAGE SYSTEMS Nov 4, 2024 Pending
Array ( [id] => 19787356 [patent_doc_number] => 20250061035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => SYSTEMS AND METHODS OF TIERED DATA STORAGE AND PROCESSING AND DECISION MAKING [patent_app_type] => utility [patent_app_number] => 18/935231 [patent_app_country] => US [patent_app_date] => 2024-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18935231 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/935231
SYSTEMS AND METHODS OF TIERED DATA STORAGE AND PROCESSING AND DECISION MAKING Oct 31, 2024 Pending
Array ( [id] => 20680490 [patent_doc_number] => 20260119311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => BIT-SHAPING VIA LINEAR BLOCK CODES [patent_app_type] => utility [patent_app_number] => 18/928804 [patent_app_country] => US [patent_app_date] => 2024-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18928804 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/928804
BIT-SHAPING VIA LINEAR BLOCK CODES Oct 27, 2024 Pending
Array ( [id] => 20717074 [patent_doc_number] => 12632325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Limiting effects of uncorrected hard failures in least recently used vector [patent_app_type] => utility [patent_app_number] => 18/918987 [patent_app_country] => US [patent_app_date] => 2024-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18918987 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/918987
Limiting effects of uncorrected hard failures in least recently used vector Oct 16, 2024 Issued
Array ( [id] => 19992670 [patent_doc_number] => 20250130892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => MEMORY DEVICE WITH CONFIGURABLE ADAPTIVE DOUBLE DEVICE DATA CORRECTION [patent_app_type] => utility [patent_app_number] => 18/906326 [patent_app_country] => US [patent_app_date] => 2024-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18906326 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/906326
MEMORY DEVICE WITH CONFIGURABLE ADAPTIVE DOUBLE DEVICE DATA CORRECTION Oct 3, 2024 Pending
Array ( [id] => 20758122 [patent_doc_number] => 12650892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Method and apparatus for generating an error out (EOUT) signal indicating a state of a virtual electronic control unit (vECU) [patent_app_type] => utility [patent_app_number] => 18/815267 [patent_app_country] => US [patent_app_date] => 2024-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1466 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18815267 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/815267
Method and apparatus for generating an error out (EOUT) signal indicating a state of a virtual electronic control unit (vECU) Sep 15, 2024 Issued
Array ( [id] => 19686350 [patent_doc_number] => 20250004895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => TEST SUPPORT APPARATUS, TEST SUPPORT METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/830728 [patent_app_country] => US [patent_app_date] => 2024-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18830728 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/830728
TEST SUPPORT APPARATUS, TEST SUPPORT METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM Sep 10, 2024 Pending
Array ( [id] => 19645018 [patent_doc_number] => 20240419538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => ECS CIRCUIT AND METHOD, AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/822292 [patent_app_country] => US [patent_app_date] => 2024-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18822292 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/822292
ECS CIRCUIT AND METHOD, AND MEMORY Sep 1, 2024 Pending
Array ( [id] => 19603250 [patent_doc_number] => 20240394130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => AUTOMATIC ERROR PREDICTION IN DATA CENTERS [patent_app_type] => utility [patent_app_number] => 18/794219 [patent_app_country] => US [patent_app_date] => 2024-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18794219 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/794219
AUTOMATIC ERROR PREDICTION IN DATA CENTERS Aug 4, 2024 Pending
Array ( [id] => 19711293 [patent_doc_number] => 20250021435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 18/787744 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10514 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18787744 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/787744
APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION Jul 28, 2024 Pending
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