Search

Joseph D. Torres

Examiner (ID: 13957, Phone: (571)272-3829 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133
Total Applications
2134
Issued Applications
1676
Pending Applications
96
Abandoned Applications
378

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16255569 [patent_doc_number] => 20200264943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => Memory Controller With Error Detection And Retry Modes Of Operation [patent_app_type] => utility [patent_app_number] => 16/805619 [patent_app_country] => US [patent_app_date] => 2020-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805619
Memory controller with error detection and retry modes of operation Feb 27, 2020 Issued
Array ( [id] => 16082585 [patent_doc_number] => 20200195279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => Device and Method for Generating a Multi-Kernel Polar Code [patent_app_type] => utility [patent_app_number] => 16/797214 [patent_app_country] => US [patent_app_date] => 2020-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16797214 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/797214
Device and method for generating a multi-kernel polar code Feb 20, 2020 Issued
Array ( [id] => 17017077 [patent_doc_number] => 11086716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Memory controller and method for decoding memory devices with early hard-decode exit [patent_app_type] => utility [patent_app_number] => 16/790547 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16790547 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/790547
Memory controller and method for decoding memory devices with early hard-decode exit Feb 12, 2020 Issued
Array ( [id] => 17033596 [patent_doc_number] => 11095420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Preemption indicator techniques [patent_app_type] => utility [patent_app_number] => 16/789797 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 15547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16789797 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/789797
Preemption indicator techniques Feb 12, 2020 Issued
Array ( [id] => 18624411 [patent_doc_number] => 11757473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Telecommunications method [patent_app_type] => utility [patent_app_number] => 17/430808 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6715 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17430808 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/430808
Telecommunications method Feb 12, 2020 Issued
Array ( [id] => 16160725 [patent_doc_number] => 20200218595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => METHOD AND ARCHITECTURE FOR CRITICAL SYSTEMS UTILIZING MULTI-CENTRIC ORTHOGONAL TOPOLOGY AND PERVASIVE RULES-DRIVEN DATA AND CONTROL ENCODING [patent_app_type] => utility [patent_app_number] => 16/787266 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16787266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/787266
METHOD AND ARCHITECTURE FOR CRITICAL SYSTEMS UTILIZING MULTI-CENTRIC ORTHOGONAL TOPOLOGY AND PERVASIVE RULES-DRIVEN DATA AND CONTROL ENCODING Feb 10, 2020 Abandoned
Array ( [id] => 16002661 [patent_doc_number] => 20200177201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => SYSTEM AND METHOD FOR PROCESSING POLAR CODE [patent_app_type] => utility [patent_app_number] => 16/784050 [patent_app_country] => US [patent_app_date] => 2020-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16784050 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/784050
System and method for processing polar code Feb 5, 2020 Issued
Array ( [id] => 16820656 [patent_doc_number] => 11005502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Iterative decoding circuit and decoding method [patent_app_type] => utility [patent_app_number] => 16/780919 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2649 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16780919 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/780919
Iterative decoding circuit and decoding method Feb 3, 2020 Issued
Array ( [id] => 17819138 [patent_doc_number] => 11424766 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-23 [patent_title] => Method and device for energy-efficient decoders [patent_app_type] => utility [patent_app_number] => 16/778918 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7145 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16778918 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/778918
Method and device for energy-efficient decoders Jan 30, 2020 Issued
Array ( [id] => 17605925 [patent_doc_number] => 11334413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Estimating an error rate associated with memory [patent_app_type] => utility [patent_app_number] => 16/752859 [patent_app_country] => US [patent_app_date] => 2020-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16752859 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/752859
Estimating an error rate associated with memory Jan 26, 2020 Issued
Array ( [id] => 17019060 [patent_doc_number] => 11088713 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-10 [patent_title] => Solid state drive implementing a rate-compatible polar code [patent_app_type] => utility [patent_app_number] => 16/748002 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8598 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748002 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748002
Solid state drive implementing a rate-compatible polar code Jan 20, 2020 Issued
Array ( [id] => 17523608 [patent_doc_number] => 20220109457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => SYSTEM AND METHOD FOR DECODING REED-MULLER CODES [patent_app_type] => utility [patent_app_number] => 17/422923 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12238 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17422923 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/422923
System and method for decoding Reed-Muller codes Jan 16, 2020 Issued
Array ( [id] => 16470330 [patent_doc_number] => 20200371867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/727648 [patent_app_country] => US [patent_app_date] => 2019-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727648 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/727648
Memory system Dec 25, 2019 Issued
Array ( [id] => 16905782 [patent_doc_number] => 20210184698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => DATA DECODING APPARATUS AND METHOD [patent_app_type] => utility [patent_app_number] => 16/722294 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722294 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/722294
Data decoding apparatus and method Dec 19, 2019 Issued
Array ( [id] => 16942241 [patent_doc_number] => 11054471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Electrical testing apparatus for spintronics devices [patent_app_type] => utility [patent_app_number] => 16/714881 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 13649 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714881 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714881
Electrical testing apparatus for spintronics devices Dec 15, 2019 Issued
Array ( [id] => 17432488 [patent_doc_number] => 20220060198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => Method for generating a signal by means of a turbo-encoder, and corresponding device and computer program. [patent_app_type] => utility [patent_app_number] => 17/416141 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9971 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17416141 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/416141
Method for generating a signal by means of a turbo-encoder, and corresponding device and computer program Dec 11, 2019 Issued
Array ( [id] => 18046609 [patent_doc_number] => 11520563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Apparatus and method for transforming matrix, and data processing system [patent_app_type] => utility [patent_app_number] => 16/711277 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6926 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711277 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711277
Apparatus and method for transforming matrix, and data processing system Dec 10, 2019 Issued
Array ( [id] => 17530592 [patent_doc_number] => 11303301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Coding method and communications device [patent_app_type] => utility [patent_app_number] => 16/710786 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 27034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710786 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710786
Coding method and communications device Dec 10, 2019 Issued
Array ( [id] => 15622721 [patent_doc_number] => 20200081765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => METHOD AND COMPUTER SYSTEM FOR FAULT TOLERANT DATA INTEGRITY VERIFICATION OF SAFETY-RELATED DATA [patent_app_type] => utility [patent_app_number] => 16/682258 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682258 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/682258
Method and computer system for fault tolerant data integrity verification of safety-related data Nov 12, 2019 Issued
Array ( [id] => 15622753 [patent_doc_number] => 20200081781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => DISTRIBUTED STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/680772 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680772 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680772
Distributed storage system Nov 11, 2019 Issued
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